PSOC E8XXGP Device Support Library

General Description

Macros

#define VID_MODE_TYPE_NON_BURST_SYNC_PULSES   0x0UL
 Video Mode Non Burst Sync Pulses.
 
#define VID_MODE_TYPE_NON_BURST_SYNC_EVENTS   0x1UL
 Video Mode Non Burst Sync Events.
 
#define VID_MODE_TYPE_BURST   0x2UL
 Video Mode Burst.
 
#define VID_MODE_TYPE_MASK   0x3
 Video mode mask.
 
#define BIT(x)   (1UL << (x))
 BIT definition.
 
#define MIPI_DSI_MODE_VIDEO   BIT(0)
 video mode
 
#define MIPI_DSI_MODE_VIDEO_BURST   BIT(1)
 video burst mode
 
#define MIPI_DSI_MODE_VIDEO_SYNC_PULSE   BIT(2)
 video pulse mode
 
#define MIPI_DSI_MODE_VIDEO_AUTO_VERT   BIT(3)
 enable auto vertical count mode
 
#define MIPI_DSI_MODE_VIDEO_HSE   BIT(4)
 enable hsync-end packets in vsync-pulse and v-porch area
 
#define MIPI_DSI_MODE_VIDEO_NO_HFP   BIT(5)
 disable hfront-porch area
 
#define MIPI_DSI_MODE_VIDEO_NO_HBP   BIT(6)
 disable hback-porch area
 
#define MIPI_DSI_MODE_VIDEO_NO_HSA   BIT(7)
 disable hsync-active area
 
#define MIPI_DSI_MODE_VSYNC_FLUSH   BIT(8)
 flush display FIFO on vsync pulse
 
#define MIPI_DSI_MODE_NO_EOT_PACKET   BIT(9)
 disable EoT packets in HS mode
 
#define MIPI_DSI_CLOCK_NON_CONTINUOUS   BIT(10)
 device supports non-continuous clock behavior (DSI spec 5.6.1)
 
#define MIPI_DSI_MODE_LPM   BIT(11)
 transmit data in low power
 
#define ENABLE_LOW_POWER   (0x3FUL << 8)
 Allow low power transmission during video transfer.
 
#define ENABLE_LOW_POWER_CMD   BIT(15)
 Enable command transmission only in Low Power mode.