MIPI DSI (MIPI Display Serial Interface)

General Description

MIPI DSI driver provides an application interface for configuring MIPI DSI IP Block.

MIPI-DSI Host Controller and D-PHY (MIPIDSI) features

• DPI-2 and and DBI-2 Type B displays.
• Up to 2 data lanes, max 1.5 Gbps per lane.
• PLL for high-speed mode clock generation.
• Generic command interface (DCS and proprietary read & write).
• Video Pattern generator.
• Ultra-Low-Power mode with disabled PLL.
• Tearing Effect interrupt for DBI displays.
• Shutdown and Color Mode control for DPI displays.

The functions and other declarations used in this driver are in cy_mipidsi.h. You can include cy_pdl.h to get access to all functions and declarations in the PDL.

More Information

For more information on the MIPI DSI and Graphics subsystem, refer to the technical reference manual (TRM).

API Reference
	Macros
	Functions
	Data Structures
	Enumerated Types