Data Structures

General Description

Data Structures
struct	cy_stc_dma_descriptor_t
	DMA descriptor structure type. More...
struct	cy_stc_dma_descriptor_config_t
	This structure is a configuration structure pre-initialized by the user and passed as a parameter to the Cy_DMA_Descriptor_Init(). More...
struct	cy_stc_dma_channel_config_t
	This structure holds the initialization values for the DMA channel. More...
struct	cy_stc_dma_crc_config_t
	This structure holds the initialization values for the CRC feature, only for CPUSS_ver2. More...

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Data Structure Documentation

cy_stc_dma_descriptor_t

struct cy_stc_dma_descriptor_t

Data Fields
uint32_t	ctl	0x00000000 Descriptor control
uint32_t	src	0x00000004 Descriptor source
uint32_t	dst	0x00000008 Descriptor destination
uint32_t	xCtl	0x0000000C Descriptor X loop control
uint32_t	yCtl	0x00000010 Descriptor Y loop control
uint32_t	nextPtr	0x00000014 Descriptor next pointer

cy_stc_dma_descriptor_config_t

struct cy_stc_dma_descriptor_config_t

Data Fields
cy_en_dma_retrigger_t	retrigger	Specifies whether the DW controller should wait for the input trigger to be deactivated.
cy_en_dma_trigger_type_t	interruptType	Sets the event that triggers an interrupt. See cy_en_dma_trigger_type_t.
cy_en_dma_trigger_type_t	triggerOutType	Sets the event that triggers an output. See cy_en_dma_trigger_type_t.
cy_en_dma_channel_state_t	channelState	Specifies whether the channel is enabled or disabled on completion of descriptor. See cy_en_dma_channel_state_t.
cy_en_dma_trigger_type_t	triggerInType	Sets what type of transfer is triggered. See cy_en_dma_trigger_type_t.
cy_en_dma_data_size_t	dataSize	The size of the data bus for transfer. See cy_en_dma_data_size_t.
cy_en_dma_transfer_size_t	srcTransferSize	The source transfer size.
cy_en_dma_transfer_size_t	dstTransferSize	The destination transfer size.
cy_en_dma_descriptor_type_t	descriptorType	The type of the descriptor. See cy_en_dma_descriptor_type_t.
void *	srcAddress	The source address of the transfer.
void *	dstAddress	The destination address of the transfer. For CPUSS_ver2 only: for CRC transfer, the CRC result without post-processing (reversing and/or XORing, if used) is placed into the dstAddress.
int32_t	srcXincrement	The address increment of the source after each X-loop transfer. Valid range is -2048 ... 2047.
int32_t	dstXincrement	The address increment of the destination after each X-loop transfer. Valid range is -2048 ... 2047.
uint32_t	xCount	The number of transfers in an X-loop. Valid range is 1 ... 256.
int32_t	srcYincrement	The address increment of the source after each Y-loop transfer. Valid range is -2048 ... 2047.
int32_t	dstYincrement	The address increment of the destination after each Y-loop transfer. Valid range is -2048 ... 2047.
uint32_t	yCount	The number of X-loops in the Y-loop. Valid range is 1 ... 256.
cy_stc_dma_descriptor_t *	nextDescriptor	The next descriptor to chain after completion. A NULL value will signify no chaining.

cy_stc_dma_channel_config_t

struct cy_stc_dma_channel_config_t

Data Fields
cy_stc_dma_descriptor_t *	descriptor	The DMA descriptor associated with the channel being initialized.
bool	preemptable	Specifies whether the channel is preemptable by another higher-priority channel.
uint32_t	priority	This parameter specifies the channel's priority.
bool	enable	This parameter specifies whether the channel is enabled after initializing.
bool	bufferable	This parameter specifies whether a write transaction can complete. without waiting for the destination to accept the write transaction data.

cy_stc_dma_crc_config_t

struct cy_stc_dma_crc_config_t

Data Fields
bool	dataReverse	Specifies the bit order in which a data byte is processed (reversal is performed after XORing): 'false': Most significant bit (bit 1) first. 'true': Least significant bit (bit 0) first.
uint32_t	dataXor	Specifies a byte mask with which each data byte is XORed. The XOR is performed before data reversal.
bool	reminderReverse	Specifies whether the remainder is bit reversed (reversal is performed after XORing). Note: this parameter doesn't affect the CRC value stored into the dstAddress. The reversed value remains in the CRC_REM_RESULT register.
uint32_t	reminderXor	Specifies a mask with which the remainder is XORed. The XOR is performed before remainder reversal. Note: this parameter doesn't affect the CRC value stored into the dstAddress. The XORed value remains in the CRC_REM_RESULT register.
uint32_t	polynomial	CRC polynomial. The polynomial is represented WITHOUT the high order bit (this bit is always assumed '1'). The polynomial should be aligned/shifted such that the more significant bits (bit 31 and down) contain the polynomial and the less significant bits (bit 0 and up) contain padding '0's. Some frequently used polynomials: CRC32: POLYNOMIAL is 0x04c11db7 (x^32 + x^26 + x^23 + x^22 + x^16 + x^12 + x^11 + x^10 + x^8 + x^7 + x^5 + x^4 + x^2 + x + 1). CRC16: POLYNOMIAL is 0x80050000 (x^16 + x^15 + x^2 + 1, shifted by 16 bit positions). CRC16 CCITT: POLYNOMIAL is 0x10210000 (x^16 + x^12 + x^5 + 1, shifted by 16 bit positions).
uint32_t	lfsrInitVal	The initial value of the Linear Feedback Shift Register.