Description

The MCWDT component configuration structure.

Data Fields
uint16_t	c0Match
	The sub-counter#0 match comparison value, for interrupt or watchdog timeout. More...

uint16_t	c1Match
	The sub-counter#1 match comparison value, for interrupt or watchdog timeout. More...

uint8_t	c0Mode
	The sub-counter#0 mode. More...

uint8_t	c1Mode
	The sub-counter#1 mode. More...

uint8_t	c2ToggleBit
	The sub-counter#2 Period / Toggle Bit value. More...

uint8_t	c2Mode
	The sub-counter#2 mode. More...

bool	c0ClearOnMatch
	The sub-counter#0 Clear On Match parameter enabled/disabled. More...

bool	c1ClearOnMatch
	The sub-counter#1 Clear On Match parameter enabled/disabled. More...

bool	c0c1Cascade
	The sub-counter#1 is clocked by LFCLK or from sub-counter#0 cascade. More...

bool	c1c2Cascade
	The sub-counter#2 is clocked by LFCLK or from sub-counter#1 cascade. More...

Field Documentation

◆ c0Match

uint16_t cy_stc_mcwdt_config_t::c0Match

The sub-counter#0 match comparison value, for interrupt or watchdog timeout.

Range: 0 - 65535 for c0ClearOnMatch = 0 and 1 - 65535 for c0ClearOnMatch = 1.

◆ c1Match

uint16_t cy_stc_mcwdt_config_t::c1Match

The sub-counter#1 match comparison value, for interrupt or watchdog timeout.

Range: 0 - 65535 for c1ClearOnMatch = 0 and 1 - 65535 for c1ClearOnMatch = 1.

◆ c0Mode

uint8_t cy_stc_mcwdt_config_t::c0Mode

The sub-counter#0 mode.

It can have the following values: CY_MCWDT_MODE_NONE, CY_MCWDT_MODE_INT, CY_MCWDT_MODE_RESET and CY_MCWDT_MODE_INT_RESET.

◆ c1Mode

uint8_t cy_stc_mcwdt_config_t::c1Mode

The sub-counter#1 mode.

It can have the following values: CY_MCWDT_MODE_NONE, CY_MCWDT_MODE_INT, CY_MCWDT_MODE_RESET and CY_MCWDT_MODE_INT_RESET.

◆ c2ToggleBit

uint8_t cy_stc_mcwdt_config_t::c2ToggleBit

The sub-counter#2 Period / Toggle Bit value.

Range: 0 - 31.

◆ c2Mode

uint8_t cy_stc_mcwdt_config_t::c2Mode

The sub-counter#2 mode.

It can have the following values: CY_MCWDT_MODE_NONE and CY_MCWDT_MODE_INT.

◆ c0ClearOnMatch

bool cy_stc_mcwdt_config_t::c0ClearOnMatch

The sub-counter#0 Clear On Match parameter enabled/disabled.

◆ c1ClearOnMatch

bool cy_stc_mcwdt_config_t::c1ClearOnMatch

The sub-counter#1 Clear On Match parameter enabled/disabled.

◆ c0c1Cascade

bool cy_stc_mcwdt_config_t::c0c1Cascade

The sub-counter#1 is clocked by LFCLK or from sub-counter#0 cascade.

◆ c1c2Cascade

bool cy_stc_mcwdt_config_t::c1c2Cascade

The sub-counter#2 is clocked by LFCLK or from sub-counter#1 cascade.