Enumerated Types

General Description

Enumerations
enum	cy_en_ble_mxd_radio_clk_div_t {   CY_BLE_MXD_RADIO_CLK_DIV_1 = 0U,   CY_BLE_MXD_RADIO_CLK_DIV_2 = 1U,   CY_BLE_MXD_RADIO_CLK_DIV_4 = 2U,   CY_BLE_MXD_RADIO_CLK_DIV_8 = 4U,   CY_BLE_MXD_RADIO_CLK_DIV_16 = 8U }
	BLE Radio ECO clock divider.
enum	cy_en_ble_mxd_radio_clk_buf_amp_t {   CY_BLE_MXD_RADIO_CLK_BUF_AMP_16M_SMALL = 0U,   CY_BLE_MXD_RADIO_CLK_BUF_AMP_16M_LARGE = 1U,   CY_BLE_MXD_RADIO_CLK_BUF_AMP_32M_SMALL = 2U,   CY_BLE_MXD_RADIO_CLK_BUF_AMP_32M_LARGE = 3U }
	Sine wave buffer output capability select.
enum	cy_en_ble_bless_xtal_clk_div_config_llclk_div_t {   CY_BLE_BLESS_XTAL_CLK_DIV_1 = 0U,   CY_BLE_BLESS_XTAL_CLK_DIV_2 = 1U,   CY_BLE_BLESS_XTAL_CLK_DIV_4 = 2U,   CY_BLE_BLESS_XTAL_CLK_DIV_8 = 3U }
	BLESS clock divider.
enum	cy_en_ble_eco_freq_t {   CY_BLE_BLESS_ECO_FREQ_16MHZ,   CY_BLE_BLESS_ECO_FREQ_32MHZ }
	BLE ECO Clock Frequency. More...
enum	cy_en_ble_eco_sys_clk_div_t {   CY_BLE_SYS_ECO_CLK_DIV_1 = 0x00U,   CY_BLE_SYS_ECO_CLK_DIV_2,   CY_BLE_SYS_ECO_CLK_DIV_4,   CY_BLE_SYS_ECO_CLK_DIV_8,   CY_BLE_SYS_ECO_CLK_DIV_INVALID }
	BLE ECO System clock divider. More...
enum	cy_en_ble_eco_status_t {   CY_BLE_ECO_SUCCESS = 0x00UL,   CY_BLE_ECO_BAD_PARAM = CY_PDL_STATUS_ERROR | CY_BLE_CLK_ID | 0x0001UL,   CY_BLE_ECO_RCB_CONTROL_LL = CY_PDL_STATUS_ERROR | CY_BLE_CLK_ID | 0x0002UL,   CY_BLE_ECO_ALREADY_STARTED = CY_PDL_STATUS_ERROR | CY_BLE_CLK_ID | 0x0003UL,   CY_BLE_ECO_HARDWARE_ERROR = CY_PDL_STATUS_ERROR | CY_BLE_CLK_ID | 0x0004UL }
	BLE ECO Clock return value. More...
enum	cy_en_ble_eco_voltage_reg_t {   CY_BLE_ECO_VOLTAGE_REG_AUTO,   CY_BLE_ECO_VOLTAGE_REG_BLESSLDO }
	BLE Voltage regulator. More...

Enumeration Type Documentation

cy_en_ble_eco_freq_t

enum cy_en_ble_eco_freq_t

BLE ECO Clock Frequency.

Enumerator
CY_BLE_BLESS_ECO_FREQ_16MHZ	ECO Frequency of 16MHz.
CY_BLE_BLESS_ECO_FREQ_32MHZ	ECO Frequency of 32MHz.

cy_en_ble_eco_sys_clk_div_t

enum cy_en_ble_eco_sys_clk_div_t

BLE ECO System clock divider.

Enumerator
CY_BLE_SYS_ECO_CLK_DIV_1	Link Layer clock divider = 1.
CY_BLE_SYS_ECO_CLK_DIV_2	Link Layer clock divider = 2.
CY_BLE_SYS_ECO_CLK_DIV_4	Link Layer clock divider = 4.
CY_BLE_SYS_ECO_CLK_DIV_8	Link Layer clock divider = 8.
CY_BLE_SYS_ECO_CLK_DIV_INVALID	Invalid Link Layer clock divider.

cy_en_ble_eco_status_t

enum cy_en_ble_eco_status_t

BLE ECO Clock return value.

Enumerator
CY_BLE_ECO_SUCCESS	ECO started successfully.
CY_BLE_ECO_BAD_PARAM	Invalid input param values.
CY_BLE_ECO_RCB_CONTROL_LL	RCB is not available for Firmware control to restart ECO.
CY_BLE_ECO_ALREADY_STARTED	ECO already started.
CY_BLE_ECO_HARDWARE_ERROR	Hardware error.

cy_en_ble_eco_voltage_reg_t

enum cy_en_ble_eco_voltage_reg_t

BLE Voltage regulator.

Enumerator
CY_BLE_ECO_VOLTAGE_REG_AUTO	Use SIMO Buck or BLE LDO regulator depend on system usage.
CY_BLE_ECO_VOLTAGE_REG_BLESSLDO	Use BLE LDO.