INTERCONNECT (Internal digital routing)

General Description

High level interface to the Cypress digital routing.

Features

Facilities for runtime manipulation of the on chip routing. The following types of connections are supported:

• Connection from a peripheral to a pin. (A dedicated connection must exist between the pin and the peripheral; see the device datasheet for more details)
• Experimental support for connecting between two on-chip "trigger" terminals.

Quick Start

• cyhal_connect_pin can be used to connect a pin to a peripheral.(A dedicated connection must exist between the pin and the peripheral; see the device datasheet for more details)
• cyhal_disconnect_pin can be used to disconnect a pin from a peripheral. The drive mode will be reset to High-Z after disconnecting

Code Snippets

Snippet 1: Connecting a pin to TCPWM block

The following code snippet demonstrates connecting a GPIO pin to an active TCPWM block on a PSoC 6 device. using the cyhal_connect_pin. It is assumed that the TCPWM is already configured and active.

    /* Find out the resource block that connects the specified pins from the
     * provided resource pin mapping table cyhal_pin_map_tcpwm_line. This example connects the
     * pin to the TCPWM line pin */
    const cyhal_resource_pin_mapping_t *map = _CYHAL_UTILS_GET_RESOURCE(P13_6, cyhal_pin_map_tcpwm_line);

    /* Obtain the GPIO pin resource */
    cyhal_resource_inst_t pin_rsc = _cyhal_utils_get_gpio_resource(P13_6);

    /* Reserve the resource in hardware manager to prevent other HAL blocks
     * from using it */
    cy_rslt_t status = cyhal_hwmgr_reserve(&pin_rsc);
    if (CY_RSLT_SUCCESS == status)
    {
        /* The resource is free, connect it to the block */
        status = cyhal_connect_pin(map);
        if (CY_RSLT_SUCCESS != status)
        {
            cyhal_hwmgr_free(&pin_rsc);
        }
    }

API Reference
	Interconnect HAL Results
	Interconnect specific return codes.

Macros
#define	CYHAL_INTERCONNECT_MUX_NOT_CONTINUATION   0xFF
	Indicates that a mux output does not continue to another mux.

Functions
cy_rslt_t	cyhal_connect_pin (const cyhal_resource_pin_mapping_t *pin_connection)
	Connect a pin to a peripheral terminal. More...
cy_rslt_t	cyhal_disconnect_pin (cyhal_gpio_t pin)
	Disconnect a peripheral from a pin. More...
cy_rslt_t	cyhal_connect_trigger (cyhal_source_t source, cyhal_dest_t dest)

Function Documentation

cyhal_connect_pin()

cy_rslt_t cyhal_connect_pin

(

const cyhal_resource_pin_mapping_t *

pin_connection

)

Connect a pin to a peripheral terminal.

This will route a direct connection from the pin to the peripheral. Any previous direct connection from the pin will be overriden.
See Snippet 1: Connecting a pin to TCPWM block

Parameters

[in]

pin_connection

The pin and target peripheral terminal to be connected

Returns

The status of the connect request

cyhal_disconnect_pin()

cy_rslt_t cyhal_disconnect_pin

(

cyhal_gpio_t

pin

)

Disconnect a peripheral from a pin.

This will also reset the pin's drive mode to High-Z.

Parameters

[in]

pin

The pin to be disconnected

Returns

The status of the disconnect request

cyhal_connect_trigger()

cy_rslt_t cyhal_connect_trigger	(	cyhal_source_t	source,
		cyhal_dest_t	dest
	)

Warning

WORK IN PROGRESS. This function is not yet fully implemented.

Connects two digital terminals on the device using any internal interconnect. A single source can drive multiple destinations, but a destination can be driven by only one source. If the destination is already connected, or the connection can not be established an error will be returned.

Parameters

[in]	source	The source of the signal to connect
[in]	dest	The destination of the signal to connect

Returns

The status of the connect request