Hardware Abstraction Layer (HAL)

General Description

Trigger connections for psoc6_03.

Typedefs

typedef cyhal_trigger_dest_psoc6_03_t cyhal_dest_t
 Typedef from device family specific trigger dest to generic trigger dest.
 

Enumerations

enum  cyhal_trigger_dest_psoc6_03_t {
  TRIGGER_CANFD0_TR_DBG_DMA_ACK0 = 0,
  TRIGGER_CANFD0_TR_EVT_SWT_IN0 = 1,
  TRIGGER_CPUSS_CTI_TR_IN0 = 2,
  TRIGGER_CPUSS_CTI_TR_IN1 = 3,
  TRIGGER_CPUSS_DMAC_TR_IN0 = 4,
  TRIGGER_CPUSS_DMAC_TR_IN1 = 5,
  TRIGGER_CPUSS_DW0_TR_IN0 = 6,
  TRIGGER_CPUSS_DW0_TR_IN1 = 7,
  TRIGGER_CPUSS_DW0_TR_IN2 = 8,
  TRIGGER_CPUSS_DW0_TR_IN3 = 9,
  TRIGGER_CPUSS_DW0_TR_IN4 = 10,
  TRIGGER_CPUSS_DW0_TR_IN5 = 11,
  TRIGGER_CPUSS_DW0_TR_IN6 = 12,
  TRIGGER_CPUSS_DW0_TR_IN7 = 13,
  TRIGGER_CPUSS_DW0_TR_IN8 = 14,
  TRIGGER_CPUSS_DW0_TR_IN9 = 15,
  TRIGGER_CPUSS_DW0_TR_IN10 = 16,
  TRIGGER_CPUSS_DW0_TR_IN11 = 17,
  TRIGGER_CPUSS_DW0_TR_IN12 = 18,
  TRIGGER_CPUSS_DW0_TR_IN13 = 19,
  TRIGGER_CPUSS_DW0_TR_IN14 = 20,
  TRIGGER_CPUSS_DW0_TR_IN15 = 21,
  TRIGGER_CPUSS_DW0_TR_IN16 = 22,
  TRIGGER_CPUSS_DW0_TR_IN17 = 23,
  TRIGGER_CPUSS_DW0_TR_IN18 = 24,
  TRIGGER_CPUSS_DW0_TR_IN19 = 25,
  TRIGGER_CPUSS_DW0_TR_IN20 = 26,
  TRIGGER_CPUSS_DW0_TR_IN21 = 27,
  TRIGGER_CPUSS_DW0_TR_IN22 = 28,
  TRIGGER_CPUSS_DW0_TR_IN23 = 29,
  TRIGGER_CPUSS_DW0_TR_IN24 = 30,
  TRIGGER_CPUSS_DW0_TR_IN25 = 31,
  TRIGGER_CPUSS_DW0_TR_IN26 = 32,
  TRIGGER_CPUSS_DW0_TR_IN27 = 33,
  TRIGGER_CPUSS_DW0_TR_IN28 = 34,
  TRIGGER_CPUSS_DW1_TR_IN0 = 35,
  TRIGGER_CPUSS_DW1_TR_IN1 = 36,
  TRIGGER_CPUSS_DW1_TR_IN2 = 37,
  TRIGGER_CPUSS_DW1_TR_IN3 = 38,
  TRIGGER_CPUSS_DW1_TR_IN4 = 39,
  TRIGGER_CPUSS_DW1_TR_IN5 = 40,
  TRIGGER_CPUSS_DW1_TR_IN6 = 41,
  TRIGGER_CPUSS_DW1_TR_IN7 = 42,
  TRIGGER_CPUSS_DW1_TR_IN8 = 43,
  TRIGGER_CPUSS_DW1_TR_IN9 = 44,
  TRIGGER_CPUSS_DW1_TR_IN10 = 45,
  TRIGGER_CPUSS_DW1_TR_IN11 = 46,
  TRIGGER_CPUSS_DW1_TR_IN12 = 47,
  TRIGGER_CPUSS_DW1_TR_IN13 = 48,
  TRIGGER_CPUSS_DW1_TR_IN14 = 49,
  TRIGGER_CPUSS_DW1_TR_IN15 = 50,
  TRIGGER_CPUSS_DW1_TR_IN16 = 51,
  TRIGGER_CPUSS_DW1_TR_IN17 = 52,
  TRIGGER_CPUSS_DW1_TR_IN18 = 53,
  TRIGGER_CPUSS_DW1_TR_IN19 = 54,
  TRIGGER_CPUSS_DW1_TR_IN20 = 55,
  TRIGGER_CPUSS_DW1_TR_IN21 = 56,
  TRIGGER_CPUSS_DW1_TR_IN22 = 57,
  TRIGGER_CPUSS_DW1_TR_IN23 = 58,
  TRIGGER_CPUSS_DW1_TR_IN24 = 59,
  TRIGGER_CPUSS_DW1_TR_IN25 = 60,
  TRIGGER_CPUSS_DW1_TR_IN26 = 61,
  TRIGGER_CPUSS_DW1_TR_IN27 = 62,
  TRIGGER_CPUSS_DW1_TR_IN28 = 63,
  TRIGGER_CPUSS_DW1_TR_IN29 = 64,
  TRIGGER_CPUSS_DW1_TR_IN30 = 65,
  TRIGGER_CPUSS_DW1_TR_IN31 = 66,
  TRIGGER_CSD_DSI_START = 67,
  TRIGGER_PASS_TR_SAR_IN = 68,
  TRIGGER_PERI_TR_DBG_FREEZE = 69,
  TRIGGER_PERI_TR_IO_OUTPUT0 = 70,
  TRIGGER_PERI_TR_IO_OUTPUT1 = 71,
  TRIGGER_TCPWM0_TR_IN0 = 72,
  TRIGGER_TCPWM0_TR_IN1 = 73,
  TRIGGER_TCPWM0_TR_IN2 = 74,
  TRIGGER_TCPWM0_TR_IN3 = 75,
  TRIGGER_TCPWM0_TR_IN4 = 76,
  TRIGGER_TCPWM0_TR_IN5 = 77,
  TRIGGER_TCPWM0_TR_IN6 = 78,
  TRIGGER_TCPWM0_TR_IN7 = 79,
  TRIGGER_TCPWM0_TR_IN8 = 80,
  TRIGGER_TCPWM0_TR_IN9 = 81,
  TRIGGER_TCPWM0_TR_IN10 = 82,
  TRIGGER_TCPWM0_TR_IN11 = 83,
  TRIGGER_TCPWM0_TR_IN12 = 84,
  TRIGGER_TCPWM0_TR_IN13 = 85,
  TRIGGER_TCPWM1_TR_IN0 = 86,
  TRIGGER_TCPWM1_TR_IN1 = 87,
  TRIGGER_TCPWM1_TR_IN2 = 88,
  TRIGGER_TCPWM1_TR_IN3 = 89,
  TRIGGER_TCPWM1_TR_IN4 = 90,
  TRIGGER_TCPWM1_TR_IN5 = 91,
  TRIGGER_TCPWM1_TR_IN6 = 92,
  TRIGGER_TCPWM1_TR_IN7 = 93,
  TRIGGER_TCPWM1_TR_IN8 = 94,
  TRIGGER_TCPWM1_TR_IN9 = 95,
  TRIGGER_TCPWM1_TR_IN10 = 96,
  TRIGGER_TCPWM1_TR_IN11 = 97,
  TRIGGER_TCPWM1_TR_IN12 = 98,
  TRIGGER_TCPWM1_TR_IN13 = 99,
  TRIGGER_USB_DMA_BURSTEND0 = 100,
  TRIGGER_USB_DMA_BURSTEND1 = 101,
  TRIGGER_USB_DMA_BURSTEND2 = 102,
  TRIGGER_USB_DMA_BURSTEND3 = 103,
  TRIGGER_USB_DMA_BURSTEND4 = 104,
  TRIGGER_USB_DMA_BURSTEND5 = 105,
  TRIGGER_USB_DMA_BURSTEND6 = 106,
  TRIGGER_USB_DMA_BURSTEND7 = 107
}
 Name of each output trigger. More...
 

Enumeration Type Documentation

◆ cyhal_trigger_dest_psoc6_03_t

Name of each output trigger.

Enumerator
TRIGGER_CANFD0_TR_DBG_DMA_ACK0 

CAN DW0 triggers (from DW back to CAN) - canfd[0].tr_dbg_dma_ack[0].

TRIGGER_CANFD0_TR_EVT_SWT_IN0 

CAN TT Sync - canfd[0].tr_evt_swt_in[0].

TRIGGER_CPUSS_CTI_TR_IN0 

CPUSS Debug trigger multiplexer - cpuss.cti_tr_in[0].

TRIGGER_CPUSS_CTI_TR_IN1 

CPUSS Debug trigger multiplexer - cpuss.cti_tr_in[1].

TRIGGER_CPUSS_DMAC_TR_IN0 

MDMA trigger multiplexer - cpuss.dmac_tr_in[0].

TRIGGER_CPUSS_DMAC_TR_IN1 

MDMA trigger multiplexer - cpuss.dmac_tr_in[1].

TRIGGER_CPUSS_DW0_TR_IN0 

PDMA0 trigger multiplexer - cpuss.dw0_tr_in[0].

TRIGGER_CPUSS_DW0_TR_IN1 

PDMA0 trigger multiplexer - cpuss.dw0_tr_in[1].

TRIGGER_CPUSS_DW0_TR_IN2 

PDMA0 trigger multiplexer - cpuss.dw0_tr_in[2].

TRIGGER_CPUSS_DW0_TR_IN3 

PDMA0 trigger multiplexer - cpuss.dw0_tr_in[3].

TRIGGER_CPUSS_DW0_TR_IN4 

PDMA0 trigger multiplexer - cpuss.dw0_tr_in[4].

TRIGGER_CPUSS_DW0_TR_IN5 

PDMA0 trigger multiplexer - cpuss.dw0_tr_in[5].

TRIGGER_CPUSS_DW0_TR_IN6 

PDMA0 trigger multiplexer - cpuss.dw0_tr_in[6].

TRIGGER_CPUSS_DW0_TR_IN7 

PDMA0 trigger multiplexer - cpuss.dw0_tr_in[7].

TRIGGER_CPUSS_DW0_TR_IN8 

USB PDMA0 Triggers - cpuss.dw0_tr_in[8].

TRIGGER_CPUSS_DW0_TR_IN9 

USB PDMA0 Triggers - cpuss.dw0_tr_in[9].

TRIGGER_CPUSS_DW0_TR_IN10 

USB PDMA0 Triggers - cpuss.dw0_tr_in[10].

TRIGGER_CPUSS_DW0_TR_IN11 

USB PDMA0 Triggers - cpuss.dw0_tr_in[11].

TRIGGER_CPUSS_DW0_TR_IN12 

USB PDMA0 Triggers - cpuss.dw0_tr_in[12].

TRIGGER_CPUSS_DW0_TR_IN13 

USB PDMA0 Triggers - cpuss.dw0_tr_in[13].

TRIGGER_CPUSS_DW0_TR_IN14 

USB PDMA0 Triggers - cpuss.dw0_tr_in[14].

TRIGGER_CPUSS_DW0_TR_IN15 

USB PDMA0 Triggers - cpuss.dw0_tr_in[15].

TRIGGER_CPUSS_DW0_TR_IN16 

SCB PDMA0 Triggers - cpuss.dw0_tr_in[16].

TRIGGER_CPUSS_DW0_TR_IN17 

SCB PDMA0 Triggers - cpuss.dw0_tr_in[17].

TRIGGER_CPUSS_DW0_TR_IN18 

SCB PDMA0 Triggers - cpuss.dw0_tr_in[18].

TRIGGER_CPUSS_DW0_TR_IN19 

SCB PDMA0 Triggers - cpuss.dw0_tr_in[19].

TRIGGER_CPUSS_DW0_TR_IN20 

SCB PDMA0 Triggers - cpuss.dw0_tr_in[20].

TRIGGER_CPUSS_DW0_TR_IN21 

SCB PDMA0 Triggers - cpuss.dw0_tr_in[21].

TRIGGER_CPUSS_DW0_TR_IN22 

SCB PDMA0 Triggers - cpuss.dw0_tr_in[22].

TRIGGER_CPUSS_DW0_TR_IN23 

SCB PDMA0 Triggers - cpuss.dw0_tr_in[23].

TRIGGER_CPUSS_DW0_TR_IN24 

SCB PDMA0 Triggers - cpuss.dw0_tr_in[24].

TRIGGER_CPUSS_DW0_TR_IN25 

SCB PDMA0 Triggers - cpuss.dw0_tr_in[25].

TRIGGER_CPUSS_DW0_TR_IN26 

SCB PDMA0 Triggers - cpuss.dw0_tr_in[26].

TRIGGER_CPUSS_DW0_TR_IN27 

SCB PDMA0 Triggers - cpuss.dw0_tr_in[27].

TRIGGER_CPUSS_DW0_TR_IN28 

SAR to PDMA1 direct connect - cpuss.dw0_tr_in[28].

TRIGGER_CPUSS_DW1_TR_IN0 

PDMA1 trigger multiplexer - cpuss.dw1_tr_in[0].

TRIGGER_CPUSS_DW1_TR_IN1 

PDMA1 trigger multiplexer - cpuss.dw1_tr_in[1].

TRIGGER_CPUSS_DW1_TR_IN2 

PDMA1 trigger multiplexer - cpuss.dw1_tr_in[2].

TRIGGER_CPUSS_DW1_TR_IN3 

PDMA1 trigger multiplexer - cpuss.dw1_tr_in[3].

TRIGGER_CPUSS_DW1_TR_IN4 

PDMA1 trigger multiplexer - cpuss.dw1_tr_in[4].

TRIGGER_CPUSS_DW1_TR_IN5 

PDMA1 trigger multiplexer - cpuss.dw1_tr_in[5].

TRIGGER_CPUSS_DW1_TR_IN6 

PDMA1 trigger multiplexer - cpuss.dw1_tr_in[6].

TRIGGER_CPUSS_DW1_TR_IN7 

PDMA1 trigger multiplexer - cpuss.dw1_tr_in[7].

TRIGGER_CPUSS_DW1_TR_IN8 

SCB PDMA1 Triggers - cpuss.dw1_tr_in[8].

TRIGGER_CPUSS_DW1_TR_IN9 

SCB PDMA1 Triggers - cpuss.dw1_tr_in[9].

TRIGGER_CPUSS_DW1_TR_IN10 

SCB PDMA1 Triggers - cpuss.dw1_tr_in[10].

TRIGGER_CPUSS_DW1_TR_IN11 

SCB PDMA1 Triggers - cpuss.dw1_tr_in[11].

TRIGGER_CPUSS_DW1_TR_IN12 

SCB PDMA1 Triggers - cpuss.dw1_tr_in[12].

TRIGGER_CPUSS_DW1_TR_IN13 

SCB PDMA1 Triggers - cpuss.dw1_tr_in[13].

TRIGGER_CPUSS_DW1_TR_IN14 

SCB PDMA1 Triggers - cpuss.dw1_tr_in[14].

TRIGGER_CPUSS_DW1_TR_IN15 

SCB PDMA1 Triggers - cpuss.dw1_tr_in[15].

TRIGGER_CPUSS_DW1_TR_IN16 

SCB PDMA1 Triggers - cpuss.dw1_tr_in[16].

TRIGGER_CPUSS_DW1_TR_IN17 

SCB PDMA1 Triggers - cpuss.dw1_tr_in[17].

TRIGGER_CPUSS_DW1_TR_IN18 

SCB PDMA1 Triggers - cpuss.dw1_tr_in[18].

TRIGGER_CPUSS_DW1_TR_IN19 

SCB PDMA1 Triggers - cpuss.dw1_tr_in[19].

TRIGGER_CPUSS_DW1_TR_IN20 

SCB PDMA1 Triggers - cpuss.dw1_tr_in[20].

TRIGGER_CPUSS_DW1_TR_IN21 

SCB PDMA1 Triggers - cpuss.dw1_tr_in[21].

TRIGGER_CPUSS_DW1_TR_IN22 

SMIF to PDMA1 direct connect - cpuss.dw1_tr_in[22].

TRIGGER_CPUSS_DW1_TR_IN23 

SMIF to PDMA1 direct connect - cpuss.dw1_tr_in[23].

TRIGGER_CPUSS_DW1_TR_IN24 

SMIF to PDMA1 direct connect - cpuss.dw1_tr_in[24].

TRIGGER_CPUSS_DW1_TR_IN25 

SMIF to PDMA1 direct connect - cpuss.dw1_tr_in[25].

TRIGGER_CPUSS_DW1_TR_IN26 

SMIF to PDMA1 direct connect - cpuss.dw1_tr_in[26].

TRIGGER_CPUSS_DW1_TR_IN27 

SMIF to PDMA1 direct connect - cpuss.dw1_tr_in[27].

TRIGGER_CPUSS_DW1_TR_IN28 

SMIF to PDMA1 direct connect - cpuss.dw1_tr_in[28].

TRIGGER_CPUSS_DW1_TR_IN29 

CAN PDMA1 triggers - cpuss.dw1_tr_in[29].

TRIGGER_CPUSS_DW1_TR_IN30 

CAN PDMA1 triggers - cpuss.dw1_tr_in[30].

TRIGGER_CPUSS_DW1_TR_IN31 

CAN PDMA1 triggers - cpuss.dw1_tr_in[31].

TRIGGER_CSD_DSI_START 

Capsense trigger multiplexer - csd.dsi_start.

TRIGGER_PASS_TR_SAR_IN 

ADC trigger multiplexer - pass.tr_sar_in.

TRIGGER_PERI_TR_DBG_FREEZE 

PERI Freeze trigger multiplexer - peri.tr_dbg_freeze.

TRIGGER_PERI_TR_IO_OUTPUT0 

HSIOM trigger multiplexer - peri.tr_io_output[0].

TRIGGER_PERI_TR_IO_OUTPUT1 

HSIOM trigger multiplexer - peri.tr_io_output[1].

TRIGGER_TCPWM0_TR_IN0 

TCPWM0 trigger multiplexer - tcpwm[0].tr_in[0].

TRIGGER_TCPWM0_TR_IN1 

TCPWM0 trigger multiplexer - tcpwm[0].tr_in[1].

TRIGGER_TCPWM0_TR_IN2 

TCPWM0 trigger multiplexer - tcpwm[0].tr_in[2].

TRIGGER_TCPWM0_TR_IN3 

TCPWM0 trigger multiplexer - tcpwm[0].tr_in[3].

TRIGGER_TCPWM0_TR_IN4 

TCPWM0 trigger multiplexer - tcpwm[0].tr_in[4].

TRIGGER_TCPWM0_TR_IN5 

TCPWM0 trigger multiplexer - tcpwm[0].tr_in[5].

TRIGGER_TCPWM0_TR_IN6 

TCPWM0 trigger multiplexer - tcpwm[0].tr_in[6].

TRIGGER_TCPWM0_TR_IN7 

TCPWM0 trigger multiplexer - tcpwm[0].tr_in[7].

TRIGGER_TCPWM0_TR_IN8 

TCPWM0 trigger multiplexer - tcpwm[0].tr_in[8].

TRIGGER_TCPWM0_TR_IN9 

TCPWM0 trigger multiplexer - tcpwm[0].tr_in[9].

TRIGGER_TCPWM0_TR_IN10 

TCPWM0 trigger multiplexer - tcpwm[0].tr_in[10].

TRIGGER_TCPWM0_TR_IN11 

TCPWM0 trigger multiplexer - tcpwm[0].tr_in[11].

TRIGGER_TCPWM0_TR_IN12 

TCPWM0 trigger multiplexer - tcpwm[0].tr_in[12].

TRIGGER_TCPWM0_TR_IN13 

TCPWM0 trigger multiplexer - tcpwm[0].tr_in[13].

TRIGGER_TCPWM1_TR_IN0 

TCPWM1 trigger multiplexer - tcpwm[1].tr_in[0].

TRIGGER_TCPWM1_TR_IN1 

TCPWM1 trigger multiplexer - tcpwm[1].tr_in[1].

TRIGGER_TCPWM1_TR_IN2 

TCPWM1 trigger multiplexer - tcpwm[1].tr_in[2].

TRIGGER_TCPWM1_TR_IN3 

TCPWM1 trigger multiplexer - tcpwm[1].tr_in[3].

TRIGGER_TCPWM1_TR_IN4 

TCPWM1 trigger multiplexer - tcpwm[1].tr_in[4].

TRIGGER_TCPWM1_TR_IN5 

TCPWM1 trigger multiplexer - tcpwm[1].tr_in[5].

TRIGGER_TCPWM1_TR_IN6 

TCPWM1 trigger multiplexer - tcpwm[1].tr_in[6].

TRIGGER_TCPWM1_TR_IN7 

TCPWM1 trigger multiplexer - tcpwm[1].tr_in[7].

TRIGGER_TCPWM1_TR_IN8 

TCPWM1 trigger multiplexer - tcpwm[1].tr_in[8].

TRIGGER_TCPWM1_TR_IN9 

TCPWM1 trigger multiplexer - tcpwm[1].tr_in[9].

TRIGGER_TCPWM1_TR_IN10 

TCPWM1 trigger multiplexer - tcpwm[1].tr_in[10].

TRIGGER_TCPWM1_TR_IN11 

TCPWM1 trigger multiplexer - tcpwm[1].tr_in[11].

TRIGGER_TCPWM1_TR_IN12 

TCPWM1 trigger multiplexer - tcpwm[1].tr_in[12].

TRIGGER_TCPWM1_TR_IN13 

TCPWM1 trigger multiplexer - tcpwm[1].tr_in[13].

TRIGGER_USB_DMA_BURSTEND0 

USB PDMA0 Acknowledge Triggers - usb.dma_burstend[0].

TRIGGER_USB_DMA_BURSTEND1 

USB PDMA0 Acknowledge Triggers - usb.dma_burstend[1].

TRIGGER_USB_DMA_BURSTEND2 

USB PDMA0 Acknowledge Triggers - usb.dma_burstend[2].

TRIGGER_USB_DMA_BURSTEND3 

USB PDMA0 Acknowledge Triggers - usb.dma_burstend[3].

TRIGGER_USB_DMA_BURSTEND4 

USB PDMA0 Acknowledge Triggers - usb.dma_burstend[4].

TRIGGER_USB_DMA_BURSTEND5 

USB PDMA0 Acknowledge Triggers - usb.dma_burstend[5].

TRIGGER_USB_DMA_BURSTEND6 

USB PDMA0 Acknowledge Triggers - usb.dma_burstend[6].

TRIGGER_USB_DMA_BURSTEND7 

USB PDMA0 Acknowledge Triggers - usb.dma_burstend[7].