DMA (Direct Memory Access)

General Description

DW (DataWire) is one of two DMA hardware implementations for PSOC6.

DW is designed for low latency memory to peripheral or peripheral to memory transfers but can also perform memory to memory transfers and peripheral to peripheral transfers.

DMAC (Direct Memory Access Controller) is the second of two DMA hardware implementations for PSOC6. DMAC is designed with high memory bandwidth for large memory to memory transfers but can perform peripheral to memory, memory to peripheral, and peripheral to peripheral transfers.

Which DMA type is used is dependent on the exact hardware and number of DMA channels already in use. This implementation will attempt to use DMAC first for memory to memory transfers and Datawire otherwise but either type may be used.

API Reference
	DMAC (Direct Memory Access Controller)
	Implementation specific interface for using the DMAC DMA peripheral.
	DW (Datawire)
	Implementation specific interface for using the Datawire DMA peripheral.

Macros
#define	CYHAL_DMA_PRIORITY_DEFAULT   CYHAL_DMA_PRIORITY_LOW
	Default DMA channel priority.
#define	CYHAL_DMA_PRIORITY_HIGH   0
	High DMA channel priority.
#define	CYHAL_DMA_PRIORITY_MEDIUM   1
	Medium DMA channel priority.
#define	CYHAL_DMA_PRIORITY_LOW   3
	Low DMA channel priority.