SysClk (System Clock)

General Description

The System Clock (SysClk) driver contains the API for configuring system and peripheral clocks.

The functions and other declarations used in this driver are in cy_sysclk.h. You can include cy_pdl.h (ModusToolbox only) to get access to all functions and declarations in the PDL.

Firmware uses the API to configure , enable, or disable a clock.

The clock system includes a variety of resources that can vary per device, including:

• Internal clock sources such as internal oscillators
• External clock sources such as crystal oscillators or a signal on an I/O pin
• Generated clocks such as a PLL, System clock and peripheral clocks

Consult the Technical Reference Manual for your device for details of the clock system.

Configuration Considerations

The availability of clock functions depend on the availability of the chip resources that support those functions. Consult the device TRM before attempting to use these functions.

Low power modes may limit the maximum clock frequency. Refer to the SysPm driver and the TRM for details.

More Information

Refer to the technical reference manual (TRM) and the device datasheet.

MISRA-C Compliance

The SysClk driver has the following specific deviations:

MISRA Rule	Rule Class (Required/Advisory)	Rule Description	Description of Deviation(s)
10.4	R	Essential type of the left hand operand dividerType (enum) is not the same as that of the right operand CY_SYSCLK_DIV_16_BIT(boolean).	The CY_SYSCLK_DIV_16_BIT which is considered as a boolean, is actually exactly an enum of type cy_en_sysclk_divider_types_t.
10.5	A	The value of an expression should not be cast to an inappropriate essential type.	This code is safe because value is checked before conversion to the enumeration.
10.8	R	The value of a composite expression shall not be cast to a different essential type category or a wider essential type.	This code is safe because value is checked before conversion to the enumeration.
13.5	R	The right hand operand of a logical && or || operator shall not contain persistent side effects.	Manually check that side effect has no impact. It will be addressed in final release.

Changelog

Version	Changes	Reason for Change
1.0	Initial version

API Reference
	Macros
	General Enumerated Types
	Internal Main Oscillator (IMO)
	The Internal Main Oscillator (IMO) is a primary clock source for the CPU core and most of the peripherals.
	External Clock Source (EXTCLK)
	The External Clock Source (EXTCLK) is a clock source routed into PSoC through a GPIO pin.
	External Crystal Oscillator (ECO)
	The External Crystal Oscillator (ECO) is a clock source that consists of an oscillator circuit that drives an external crystal through its dedicated ECO pins.
	Phase Locked Loop (PLL)
	The PLL is a clock generation circuit that can be used to produce a higher frequency clock from a reference clock.
	Internal Low-Speed Oscillator (ILO)
	The ILO operates with no external components and outputs a clock signal at roughly 40 kHz.
	Low Power Callback
	Entering and exiting low power modes require compatible clock configurations to be set before entering low power and restored upon wake-up and exit.
	Watch Crystal Oscillator (WCO)
	High-Frequency Clocks
	The high frequency clock ClkHf is a source for the system clock for CPU and the peropheral clock didviders.
	Peripherals Clock Dividers
	There are multiple peripheral clock dividers that, in effect, create multiple separate peripheral clocks:
	System Clock
	The system clock is the source clock for CPU core (Cortex-M0+ in PSoC 4).
	Pump Clock
	The pump clock is a clock source used to provide analog precision in low voltage applications.