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PDStack Middleware Library
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PDStack Middleware Library
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Describes the PDStack macros.
Macros | |
| #define | CY_PDSTACK_MW_VERSION_MAJOR (3) |
| PDStack middleware major version. | |
| #define | CY_PDSTACK_MW_VERSION_MINOR (20) |
| PDStack middleware minor version. | |
| #define | CY_PD_TYPE_C_2_0_REVISION (0x0200u) |
| USB Type-C specification version 2.0. | |
| #define | CY_PD_EXTD_STATUS_PRESENT_INPUT_OFFSET (1u) |
| Extended status present input offset. | |
| #define | CY_PD_MAX_SRC_CAP_TRY (6u) |
| Number of unacknowledged source CAP messages used to determine if the device connected is PD capable or not. More... | |
| #define | CY_PD_GIVE_BACK_MASK (0x8000u) |
| Masks for the give-back supported bit in the snkPdoMinMaxCur field of cy_stc_pdstack_port_cfg_t. More... | |
| #define | CY_PD_SNK_MIN_MAX_MASK (0x3FFu) |
| Masks to extract the actual min/max current value from the snkPdoMinMaxCur field of cy_stc_pdstack_port_cfg_t. More... | |
| #define | CY_PD_MAX_SRC_CAP_COUNT (50u) |
| Maximum retries of source capability messages. More... | |
| #define | CY_PD_MAX_HARD_RESET_COUNT (3u) |
| Maximum hard reset retry count. More... | |
| #define | CY_PD_MAX_CBL_DSC_ID_COUNT (20u) |
| Maximum number of cable discovery DISCOVER_IDENTITY messages that should be sent out. More... | |
| #define | CY_PD_MAX_PR_SWAP_WAIT_COUNT (2u) |
| Number of PR_SWAP messages for which DUT sends a WAIT response to allow VConn_SWAP completion. More... | |
| #define | CY_PD_MAX_NO_OF_SPR_DO (7u) |
| Maximum number of SPR DOs in a packet. More... | |
| #define | CY_PD_MAX_NO_OF_DO (7u) |
| Maximum number of DOs in a packet. More... | |
| #define | CY_PD_MAX_NO_OF_PDO (CY_PD_MAX_NO_OF_DO) |
| Maximum number of PDOs in a packet. More... | |
| #define | CY_PD_MAX_NO_OF_SPR_PDO (CY_PD_MAX_NO_OF_SPR_DO) |
| Maximum number of SPR PDOs in a packet. More... | |
| #define | CY_PD_MAX_NO_OF_EPR_PDO (6u) |
| Maximum number of EPR PDOs in a packet. More... | |
| #define | CY_PD_MAX_NO_OF_VDO (CY_PD_MAX_NO_OF_DO) |
| Maximum number of VDOs in a packet. More... | |
| #define | CY_PD_VDM_HEADER_IDX (0u) |
| Index of VDM header data object in a received message. More... | |
| #define | CY_PD_BDO_HDR_IDX (0u) |
| Index of BIST header data object in a received message. More... | |
| #define | CY_PD_ID_HEADER_IDX (1u) |
| Index of ID_HEADER data object in a received VDM. More... | |
| #define | CY_PD_CERT_STAT_IDX (2u) |
| Index of CERT_STAT data object in a received VDM. More... | |
| #define | CY_PD_PRODUCT_VDO_IDX (3u) |
| Index of PRODUCT VDO in a received VDM. More... | |
| #define | CY_PD_PRODUCT_TYPE_VDO_1_IDX (4u) |
| Index of the first product type VDO in a VDM. More... | |
| #define | CY_PD_PRODUCT_TYPE_VDO_2_IDX (5u) |
| Index of the second product type VDO in a VDM. More... | |
| #define | CY_PD_PRODUCT_TYPE_VDO_3_IDX (6u) |
| Index of the third product type VDO in a VDM. More... | |
| #define | CY_PD_RDO_IDX (0u) |
| Index of request data objects in a received message. More... | |
| #define | CY_PD_MAX_EXTD_PKT_SIZE (260u) |
| Maximum extended message size in bytes. More... | |
| #define | CY_PDSTACK_MAX_EXTD_PKT_WORDS (65u) |
| Maximum extended message 32-bit words. More... | |
| #define | CY_PD_MAX_EXTD_MSG_LEGACY_LEN (26u) |
| Maximum legacy extended message size in bytes. More... | |
| #define | CY_PD_MAX_MESSAGE_ID (7u) |
| Maximum message ID value in PD Header. More... | |
| #define | CY_PD_MAX_SOP_TYPES (3U) |
| Max SOP types excluding hard reset, cable reset, SOP_PDEBUG, and SOP_DPDEBUG. More... | |
| #define | CY_PD_STD_SVID (0xFF00UL) |
| Standard SVID defined by USB PD specification. More... | |
| #define | CY_PD_DP_SVID (0xFF01UL) |
| DisplayPort SVID defined by VESA specification. More... | |
| #define | CY_PD_TBT_SVID (0x8087UL) |
| Thunderbolt SVID defined by Intel specification. More... | |
| #define | CY_PD_APPLE_SVID (0x05ACUL) |
| Apple SVID defined by Apple specification. More... | |
| #define | CY_PD_UFP_NON_PH_ALT_MODE_SUPP_MASK (0x4u) |
| UFP supports non-physical alternate mode UFP VDO1 mask. More... | |
| #define | CY_PD_CY_VID (0x04B4UL) |
| Infineon VID defined by Infineon for field upgrades. More... | |
| #define | CY_PD_STD_VDM_VERSION_IDX (13u) |
| Position of VDM version field in structured VDM header. More... | |
| #define | CY_PD_STD_VDM_MINOR_VERSION_IDX (11u) |
| Position of VDM version field in structured VDM header. More... | |
| #define | CY_PD_STD_VDM_VERSION_REV3 (1u) |
| VDM version 2.0. More... | |
| #define | CY_PD_STD_VDM_VERSION_REV2 (0u) |
| VDM version 1.0. More... | |
| #define | CY_PD_STD_VDM_VERSION (0u) |
| Default VDM version used. More... | |
| #define | CY_PD_VSAFE_0V_PR_SWAP_SNK_SRC (3000u) |
| Maximum voltage allowed when PS_RDY is received during a SNK to SRC PR_SWAP. More... | |
| #define | CY_PD_VSAFE_0V_HARD_RESET (3000u) |
| Maximum voltage allowed at the end of a hard reset when EZ-PD(TM) PMG1 is SNK. More... | |
| #define | CY_PD_VOLT_PER_UNIT (50u) |
| Voltage unit used in PDOs. More... | |
| #define | CY_PD_VOLT_PER_UNIT_PPS (100u) |
| Voltage unit (mV) used in PPS PDOs. More... | |
| #define | CY_PD_CURRENT_PPS_MULTIPLIER (5u) |
| Multiplier used to convert from the current unit used in other PDOs to that used in PPS PDO/RDO. More... | |
| #define | CY_PD_VOLT_PPS_MULTIPLIER (5u) |
| Multiplier used to convert from the voltage unit used in PPS PDO to RDO. More... | |
| #define | CY_PD_CURRENT_AVS_MULTIPLIER (5u) |
| Multiplier used to convert from the current unit used in other PDOs to that used in AVS PDO/RDO. More... | |
| #define | CY_PD_VOLT_AVS_MULTIPLIER (4u) |
| Multiplier used to convert from the voltage unit used in AVS PDO to RDO. More... | |
| #define | CY_PD_ISAFE_0A (0u) |
| VBus current usage = 0 A. More... | |
| #define | CY_PD_ISAFE_DEF (50u) |
| VBus current usage = 0.5 A. More... | |
| #define | CY_PD_I_0P9A (90u) |
| VBus current usage = 0.9 A. More... | |
| #define | CY_PD_I_1A (100u) |
| VBus current usage = 1.0 A. More... | |
| #define | CY_PD_I_1P5A (150u) |
| VBus current usage = 1.5 A. More... | |
| #define | CY_PD_I_2A (200u) |
| VBus current usage = 2.0 A. More... | |
| #define | CY_PD_I_3A (300u) |
| VBus current usage = 3.0 A. More... | |
| #define | CY_PD_I_4A (400u) |
| VBus current usage = 4.0 A. More... | |
| #define | CY_PD_I_5A (500u) |
| VBus current usage = 5.0 A. More... | |
| #define | CY_PD_CUR_PER_UNIT (10u) |
| Current unit used in PDOs. More... | |
| #define | CY_PD_SNK_DETACH_VBUS_POLL_COUNT (5u) |
| Number of VBus checks used to detect detach as the sink. More... | |
| #define | CY_PD_DRP_TOGGLE_PERIOD (75u) |
| Minimum DRP toggling period, in ms. More... | |
| #define | CY_PD_SRC_DRP_MIN_DC (30u) |
| Minimum percentage of DRP period for a source. More... | |
| #define | CY_PD_TYPEC_FSM_NONE (0x00000000u) |
| Type-C state machine inactive mode. More... | |
| #define | CY_PD_TYPEC_FSM_GENERIC (0x00000001u) |
| Type-C state machine active mode. More... | |
| #define | CY_PD_HPD_RX_ACTIVITY_TIMER_PERIOD_MIN (5u) |
| Minimum HPD receiver timer period in ms. More... | |
| #define | CY_PD_HPD_RX_ACTIVITY_TIMER_PERIOD_MAX (105u) |
| Maximum HPD receiver timer period in ms. More... | |
| #define | CY_PD_NO_RESPONSE_TIMER_PERIOD (5000u) |
| PD No response timer period in ms. More... | |
| #define | CY_PD_CBL_POWER_UP_TIMER_PERIOD (55u) |
| tVConnStable delay required by cable marker to power up. More... | |
| #define | CY_PD_CBL_DSC_ID_TIMER_PERIOD (49u) |
| Cable discovery timer period in ms. More... | |
| #define | CY_PD_CBL_DSC_ID_START_TIMER_PERIOD (43u) |
| Cable discovery start period in ms. More... | |
| #define | CY_PD_CBL_DELAY_TIMER_PERIOD (2u) |
| Cable delay timer period in ms. More... | |
| #define | CY_PD_PHY_BUSY_TIMER_PERIOD (15u) |
| Period of the timer used internally by stack to prevent PHY lockup in TX state. More... | |
| #define | CY_PD_HARD_RESET_TX_TIMER_PERIOD (20u) |
| Hard reset transmit timer period in ms. More... | |
| #define | CY_PD_VCONN_SWAP_INITIATOR_TIMER_PERIOD (110u) |
| This timer is used by stack to do auto retry VCONN swap before PR swap (if DUT is a sink). More... | |
| #define | CY_PD_VCONN_SWAP_INITIATOR_DELAY_PERIOD (500u) |
| Delay between VConn swap attempts when 5 V supply source is not present. More... | |
| #define | CY_PD_VBUS_TURN_ON_TIMER_PERIOD (275u) |
| VBus ON timer period in ms. More... | |
| #define | CY_PD_EPR_VBUS_TURN_ON_TIMER_PERIOD (700u) |
| VBus ON timer period in ms for EPR mode. More... | |
| #define | CY_PD_VBUS_TURN_OFF_TIMER_PERIOD (625u) |
| VBus OFF timer period in ms. More... | |
| #define | CY_PD_PS_SRC_TRANS_TIMER_PERIOD (400u) |
| Source transition timer period in ms. More... | |
| #define | CY_PD_PS_EPR_FIXED_SRC_TRANS_TIMER_PERIOD (860u) |
| Src.Trans timer period in ms for EPR fixed. More... | |
| #define | CY_PD_PS_EPR_AVS_LARGE_SRC_TRANS_TIMER_PERIOD (700u) |
| Src.Trans timer period in ms for EPR AVS Large. | |
| #define | CY_PD_PS_EPR_AVS_SMALL_SRC_TRANS_TIMER_PERIOD (50u) |
| Src.Trans timer period in ms for EPR AVS small. More... | |
| #define | CY_PD_PS_SRC_OFF_TIMER_PERIOD (900u) |
| Source off-timer period in ms. More... | |
| #define | CY_PD_PS_SRC_ON_TIMER_PERIOD (450u) |
| Source on timer period in ms. More... | |
| #define | CY_PD_PS_SNK_TRANSITION_TIMER_PERIOD (500u) |
| Sink transition period in ms. More... | |
| #define | CY_PD_EPR_SRC_RECOVER_TIMER_PERIOD (1250u) |
| Src.Recover timer period in ms for EPR mode. More... | |
| #define | CY_PD_EPR_SRC_RECOVER_TIMER_PERIOD (1250u) |
| Src.Recover timer period in ms for EPR mode. More... | |
| #define | CY_PD_PS_SNK_EPR_TRANSITION_TIMER_PERIOD (925u) |
| EPR Snk. More... | |
| #define | CY_PD_PSOURCE_AVS_TRANS_SMALL_PERIOD (50u) |
| Time (in ms) allowed for source voltage to become valid. More... | |
| #define | CY_PD_PSOURCE_AVS_TRANS_LARGE_PERIOD (700u) |
| Time (in ms) allowed for source voltage to become valid. More... | |
| #define | CY_PD_SRC_RECOVER_TIMER_PERIOD (800u) |
| Source Recover timer period in ms. More... | |
| #define | CY_PD_3_SENDER_RESPONSE_TIMER_PERIOD (30u) |
| Sender response timeout period in ms for PD3. More... | |
| #define | CY_PD_2_SENDER_RESPONSE_TIMER_PERIOD (27u) |
| Sender response timeout period in ms for PD2. More... | |
| #define | CY_PD_RECEIVER_RESPONSE_TIMER_PERIOD (15u) |
| Receiver response timeout period in ms. More... | |
| #define | CY_PD_SINK_WAIT_CAP_TIMER_PERIOD (400u) |
| Sink wait cap period in ms. More... | |
| #define | CY_PD_SRC_CAP_TIMER_PERIOD (180u) |
| Source cap timer period in ms. More... | |
| #define | CY_PD_SWAP_SRC_START_TIMER_PERIOD (55u) |
| Source start (during PR_SWAP) period in ms. More... | |
| #define | CY_PD_SOURCE_TRANSITION_TIMER_PERIOD (28u) |
| Source voltage transition timer period in ms. More... | |
| #define | CY_PD_VCONN_OFF_TIMER_PERIOD (25u) |
| VConn off-timer period in ms. More... | |
| #define | CY_PD_VCONN_ON_TIMER_PERIOD (100u) |
| VConn on timer period in ms. More... | |
| #define | CY_PD_UFP_VCONN_DISCHARGE_DURATION (10u) |
| Duration for which the UFP discharges VConn during Data_Reset sequence. More... | |
| #define | CY_PD_VCONN_SRC_DISC_TIMER_PERIOD (200u) |
| VConnSourceDischarge timer period. More... | |
| #define | CY_PD_VCONN_REAPPLIED_TIMER_PERIOD (18u) |
| tVConnReapplied period from USB PD specification. More... | |
| #define | CY_PD_DATA_RESET_TIMER_PERIOD (220u) |
| Time between Data_Reset is accepted and Data_Reset_Complete message has to be sent. More... | |
| #define | CY_PD_DATA_RESET_TIMEOUT_PERIOD (250u) |
| Data_Reset_Complete timeout period. More... | |
| #define | CY_PD_DATA_RESET_COMPLETION_DELAY (225u) |
| Delay applied before DFP sends Data_Reset_Complete message. More... | |
| #define | CY_PD_UFP_DATA_RESET_FAIL_TIMER_PERIOD (500u) |
| UFP Data_Reset complete timeout period. More... | |
| #define | CY_PD_VCONN_TURN_ON_TIMER_PERIOD (10u) |
| Period of VConn monitoring checks done internally. More... | |
| #define | CY_PD_CBL_READY_TIMER_PERIOD (50u) |
| This timer is the delay between PD startup and sending a cable to discover the ID request to ensure the cable is ready to respond. More... | |
| #define | CY_PD_VDM_RESPONSE_TIMER_PERIOD (27u) |
| VDM response timer period in ms. More... | |
| #define | CY_PD_VDM_ENTER_MODE_RESPONSE_TIMER_PERIOD (45u) |
| Enter mode response timeout period in ms. More... | |
| #define | CY_PD_VDM_EXIT_MODE_RESPONSE_TIMER_PERIOD (45u) |
| Exit mode response timeout period in ms. More... | |
| #define | CY_PD_DPM_RESP_REC_RESP_PERIOD (20u) |
| VDM receiver response timer period in ms. More... | |
| #define | CY_PD_BIST_CONT_MODE_TIMER_PERIOD (55u) |
| BIST continuous mode period in ms. More... | |
| #define | CY_PD_SINK_VBUS_TURN_OFF_TIMER_PERIOD (750u) |
| Time in ms allowed for VBus to turn OFF during hard reset. More... | |
| #define | CY_PD_SINK_CY_PD_VBUS_TURN_ON_TIMER_PERIOD (1300u) |
| Time in ms allowed for VBus to turn on during hard reset. More... | |
| #define | CY_PD_PS_HARD_RESET_TIMER_PERIOD (27u) |
| Hard reset timer period in ms. More... | |
| #define | CY_PD_COLLISION_SRC_COOL_OFF_TIMER_PERIOD (5u) |
| Time for which PD 3.0 source will keep Rp as SinkTxNG after returning to Ready state. More... | |
| #define | CY_PD_SINK_TX_TIMER_PERIOD (18u) |
| Delay between AMS initiation attempts by PD 3.0 sink while Rp = SinkTxNG. More... | |
| #define | CY_PD_PPS_SRC_TIMER_PERIOD (14000u) |
| PPS timer period in ms. More... | |
| #define | CY_PD_TYPEC_CC_DEBOUNCE_TIMER_PERIOD (140u) |
| CC debounce period in ms from Type-C spec. More... | |
| #define | CY_PD_TYPEC_PD_DEBOUNCE_TIMER_PERIOD (11u) |
| PD debounce period in ms. More... | |
| #define | CY_PD_TYPEC_RD_DEBOUNCE_TIMER_PERIOD (12u) |
| Rd debounce period (detach detection) in ms. More... | |
| #define | CY_PD_TYPEC_ATTACH_WAIT_ENTRY_DELAY_PERIOD (10u) |
| Delay between Attached.Wait state entry and start of checks for detached status. More... | |
| #define | CY_PD_TYPEC_SRC_DETACH_DEBOUNCE_PERIOD (2u) |
| Debounce period used to detect detach when it is the source. More... | |
| #define | CY_PD_TYPEC_PD3_RPCHANGE_DEBOUNCE_PERIOD (2u) |
| Period in ms used to detect Rp change in a PD 3.0 contract. More... | |
| #define | CY_PD_TYPEC_ERROR_RECOVERY_TIMER_PERIOD (250u) |
| Type-C error recovery timer period in ms. More... | |
| #define | CY_PD_TYPEC_DRP_TRY_TIMER_PERIOD (110u) |
| Type-C try DRP timer period in ms. More... | |
| #define | CY_PD_TYPEC_TRY_TIMEOUT_PERIOD (800u) |
| Type-C try timeout timer period in ms. More... | |
| #define | CY_PD_SLN_STATUS_CHECK_PERIOD (10u) |
| Period in ms to check whether the solution state allows to move forward with Type-C connection. More... | |
| #define | CY_PD_EPR_MODE_ENTER_TIMEOUT_PERIOD (500u) |
| EPR mode entry timeout in ms. | |
| #define | CY_PD_EPR_MODE_EXIT_TIMEOUT_PERIOD (500u) |
| EPR mode exit timeout in ms. | |
| #define | CY_PD_EPR_SNK_KEEPALIVE_TIMER_PERIOD (375u) |
| EPR sink Keepalive timer period in ms. | |
| #define | CY_PD_EPR_SRC_KEEPALIVE_TIMER_PERIOD (900u) |
| EPR source Keepalive timer period in ms. | |
| #define | CY_PD_CHUNK_SENDER_REQUEST_TIMER_PERIOD (27u) |
| Chunk sender request timeout period in ms. More... | |
| #define | CY_PD_CHUNK_SENDER_RESPONSE_TIMER_PERIOD (27u) |
| Chunk sender response timeout period in ms. More... | |
| #define | CY_PD_CHUNK_RECEIVER_REQUEST_TIMER_PERIOD (15u) |
| Chunk received request timeout period in ms. More... | |
| #define | CY_PD_CHUNK_RECEIVER_RESPONSE_TIMER_PERIOD (15u) |
| Chunk receiver response timeout period in ms. More... | |
| #define | CY_PD_FRS_TX_ENABLE_MASK (0x02u) |
| FRS transmit enable flag in the config table setting. More... | |
| #define | CY_PD_FRS_RX_ENABLE_MASK (0x01u) |
| FRS receive enable flag in the config table setting. More... | |
| #define | CY_PD_EXT_SRCCAP_SIZE (25u) |
| Size of extended source capabilities message in bytes. More... | |
| #define | CY_PD_EXT_SRCCAP_BUF_SIZE (28u) |
| Size of extended source capabilities message buffer. More... | |
| #define | CY_PD_EXT_SRCCAP_INP_INDEX (21u) |
| Index of source inputs field in extended source caps. More... | |
| #define | CY_PD_EXT_SRCCAP_INP_UNCONSTRAINED (0x02u) |
| Mask for unconstrained source input in extended source caps. More... | |
| #define | CY_PD_EXT_SRCCAP_PDP_INDEX (23u) |
| Index of PDP field in extended source caps. More... | |
| #define | CY_PD_EXT_SPR_SRCCAP_PDP_INDEX (23u) |
| Index of SPR PDP field in extended source caps. More... | |
| #define | CY_PD_EXT_EPR_SRCCAP_PDP_INDEX (24u) |
| Index of EPR PDP field in extended source caps. More... | |
| #define | CY_PD_EXT_SNKCAP_SIZE (24u) |
| Size of extended sink cap message in bytes. More... | |
| #define | CY_PD_EXT_SNKCAP_BUF_SIZE (28u) |
| Size of the buffer allocated for extended sink cap data. More... | |
| #define | CY_PD_EXT_SNKCAP_VERS_INDEX (10u) |
| Offset of SKEDB version field in Ext. More... | |
| #define | CY_PD_EXT_STATUS_SIZE (7u) |
| Size of status extended message in bytes. More... | |
| #define | CY_PD_EXT_PPS_STATUS_SIZE (4u) |
| Size of PPS status extended message in bytes. More... | |
| #define | CY_PD_EPR_AVS_SMALL_STEP_VOLTAGE (1000u) |
| Size of EPR Avs small step. | |
| #define | CY_PD_EXT_SNKCAP_EPRPDP_INDEX (22u) |
| Index of EPR PDP field in extended sink caps. More... | |
| #define | CY_PD_EXTERNALLY_POWERED_BIT_POS (7u) |
| Externally powered bit position in source PDO mask. More... | |
| #define | CY_PD_FIX_SRC_PDO_MASK_REV2 (0xFE3FFFFFu) |
| Mask to be applied on fixed supply source PDO for PD Rev 2.0. | |
| #define | CY_PD_FIX_SRC_PDO_MASK_REV3 (0xFF3FFFFFu) |
| Mask to be applied on fixed supply source PDO for PD Rev 3.0. | |
| #define | CY_PD_FLAG_CONTRACT_NEG_ACTIVE (1u) |
| Status field indicating that contract negotiation is in progress. More... | |
| #define | CY_PD_FLAG_EXPLICIT_CONTRACT (2u) |
| Status field indicating that explicit contract is present. More... | |
| #define | CY_PD_FLAG_SRC_READY (4u) |
| Status field indicating that source is ready. More... | |
| #define | CY_PD_FLAG_POWER_SINK (8u) |
| Status field indicating that the port is currently a sink. More... | |
| #define | CY_PD_CC_STAT_ZOPEN (0u) |
| CC line status: ZOpen. More... | |
| #define | CY_PD_CC_STAT_DRP_TOGGLE (1u) |
| CC line status: DRP toggle in progress. More... | |
| #define | CY_PD_CC_STAT_RD_PRESENT (2u) |
| CC line status: Rd is applied. More... | |
| #define | CY_PD_CC_STAT_RP_PRESENT (4u) |
| CC line status: Rp is applied. More... | |
| #define | CY_PD_CC_STAT_VCONN_ACTIVE (8u) |
| CC line status: VConn is applied. More... | |
| #define | CY_PD_DPM_ERROR_NONE (0u) |
| No additional DPM error information is available. More... | |
| #define | CY_PD_DPM_ERROR_NO_VCONN (1u) |
| DPM command failed because of the absence of VConn. More... | |
| #define | CY_PD_USB4_EUDO_USB4_EN_MASK (0x26000000u) |
| Enter USB DO USB4 mode mask. More... | |
| #define | CY_PD_USB_MODE_USB4 (2u) |
| USB4 data mode as defined in entering USB DO. More... | |
| #define | CY_PD_USB_MODE_USB3 (1u) |
| USB 3.2 data mode as defined in entering USB DO. More... | |
| #define | CY_PD_USB_MODE_USB2 (0u) |
| USB 2.0 data mode as defined in entering USB DO. More... | |
| #define | CY_PD_TBT_GEN_3 (3u) |
| TBT Gen 3 cable identifier in the TBT cable disc mode VDO response. More... | |
| #define | CY_PD_UFP_VDO_1_RECFG_ALT_MODE_PARAM_MASK (0x20u) |
| TBT Gen 3 cable identifier in the TBT cable disc mode VDO response. More... | |
| #define | CY_PD_DP_HPD_TYPE_GPIO (0u) |
| GPIO based HPD configuration. More... | |
| #define | CY_PD_DP_HPD_TYPE_VIRTUAL (1u) |
| Virtual (I2C based) HPD configuration. More... | |
| #define | CY_PD_HOST_SBU_CFG_FULL (0u) |
| Full (AUX/LSXX and polarity) selection for SBU MUX. More... | |
| #define | CY_PD_HOST_SBU_CFG_FIXED_POL (1u) |
| SBU MUX (AUX/LSXX) connection without polarity switch. More... | |
| #define | CY_PD_HOST_SBU_CFG_PASS_THROUGH (2u) |
| Pass through SBU MUX (AUX only) connection. More... | |
| #define | CY_PD_PDO_UNCONSTRAINED_BIT_MASK (0x80u) |
| Unconstrained bit mask. More... | |
| #define CY_PD_MAX_SRC_CAP_TRY (6u) |
Number of unacknowledged source CAP messages used to determine if the device connected is PD capable or not.
| #define CY_PD_GIVE_BACK_MASK (0x8000u) |
Masks for the give-back supported bit in the snkPdoMinMaxCur field of cy_stc_pdstack_port_cfg_t.
| #define CY_PD_SNK_MIN_MAX_MASK (0x3FFu) |
Masks to extract the actual min/max current value from the snkPdoMinMaxCur field of cy_stc_pdstack_port_cfg_t.
| #define CY_PD_MAX_SRC_CAP_COUNT (50u) |
Maximum retries of source capability messages.
| #define CY_PD_MAX_HARD_RESET_COUNT (3u) |
Maximum hard reset retry count.
| #define CY_PD_MAX_CBL_DSC_ID_COUNT (20u) |
Maximum number of cable discovery DISCOVER_IDENTITY messages that should be sent out.
| #define CY_PD_MAX_PR_SWAP_WAIT_COUNT (2u) |
Number of PR_SWAP messages for which DUT sends a WAIT response to allow VConn_SWAP completion.
| #define CY_PD_MAX_NO_OF_SPR_DO (7u) |
Maximum number of SPR DOs in a packet.
Limited by PD message definition.
| #define CY_PD_MAX_NO_OF_DO (7u) |
Maximum number of DOs in a packet.
Limited by PD message definition.
| #define CY_PD_MAX_NO_OF_PDO (CY_PD_MAX_NO_OF_DO) |
Maximum number of PDOs in a packet.
Limited by PD message definition.
| #define CY_PD_MAX_NO_OF_SPR_PDO (CY_PD_MAX_NO_OF_SPR_DO) |
Maximum number of SPR PDOs in a packet.
Limited by PD message definition.
| #define CY_PD_MAX_NO_OF_EPR_PDO (6u) |
Maximum number of EPR PDOs in a packet.
Limited by PD message definition.
| #define CY_PD_MAX_NO_OF_VDO (CY_PD_MAX_NO_OF_DO) |
Maximum number of VDOs in a packet.
Limited by PD message definition.
| #define CY_PD_VDM_HEADER_IDX (0u) |
Index of VDM header data object in a received message.
| #define CY_PD_BDO_HDR_IDX (0u) |
Index of BIST header data object in a received message.
| #define CY_PD_ID_HEADER_IDX (1u) |
Index of ID_HEADER data object in a received VDM.
| #define CY_PD_CERT_STAT_IDX (2u) |
Index of CERT_STAT data object in a received VDM.
| #define CY_PD_PRODUCT_VDO_IDX (3u) |
Index of PRODUCT VDO in a received VDM.
| #define CY_PD_PRODUCT_TYPE_VDO_1_IDX (4u) |
Index of the first product type VDO in a VDM.
| #define CY_PD_PRODUCT_TYPE_VDO_2_IDX (5u) |
Index of the second product type VDO in a VDM.
| #define CY_PD_PRODUCT_TYPE_VDO_3_IDX (6u) |
Index of the third product type VDO in a VDM.
| #define CY_PD_RDO_IDX (0u) |
Index of request data objects in a received message.
| #define CY_PD_MAX_EXTD_PKT_SIZE (260u) |
Maximum extended message size in bytes.
| #define CY_PDSTACK_MAX_EXTD_PKT_WORDS (65u) |
Maximum extended message 32-bit words.
Each word is 32 bit.
| #define CY_PD_MAX_EXTD_MSG_LEGACY_LEN (26u) |
Maximum legacy extended message size in bytes.
| #define CY_PD_MAX_MESSAGE_ID (7u) |
Maximum message ID value in PD Header.
| #define CY_PD_MAX_SOP_TYPES (3U) |
Max SOP types excluding hard reset, cable reset, SOP_PDEBUG, and SOP_DPDEBUG.
| #define CY_PD_STD_SVID (0xFF00UL) |
Standard SVID defined by USB PD specification.
| #define CY_PD_DP_SVID (0xFF01UL) |
DisplayPort SVID defined by VESA specification.
| #define CY_PD_TBT_SVID (0x8087UL) |
Thunderbolt SVID defined by Intel specification.
| #define CY_PD_APPLE_SVID (0x05ACUL) |
Apple SVID defined by Apple specification.
| #define CY_PD_UFP_NON_PH_ALT_MODE_SUPP_MASK (0x4u) |
UFP supports non-physical alternate mode UFP VDO1 mask.
| #define CY_PD_CY_VID (0x04B4UL) |
Infineon VID defined by Infineon for field upgrades.
| #define CY_PD_STD_VDM_VERSION_IDX (13u) |
Position of VDM version field in structured VDM header.
| #define CY_PD_STD_VDM_MINOR_VERSION_IDX (11u) |
Position of VDM version field in structured VDM header.
| #define CY_PD_STD_VDM_VERSION_REV3 (1u) |
VDM version 2.0.
Used under USB PD Revision 3.0.
| #define CY_PD_STD_VDM_VERSION_REV2 (0u) |
VDM version 1.0.
Used under USB PD Revision 2.0.
| #define CY_PD_STD_VDM_VERSION (0u) |
Default VDM version used.
Corresponds to VDM version 1.0.
| #define CY_PD_VSAFE_0V_PR_SWAP_SNK_SRC (3000u) |
Maximum voltage allowed when PS_RDY is received during a SNK to SRC PR_SWAP.
This is set to 3.0 V.
| #define CY_PD_VSAFE_0V_HARD_RESET (3000u) |
Maximum voltage allowed at the end of a hard reset when EZ-PD(TM) PMG1 is SNK.
This is set to 3.0 V.
| #define CY_PD_VOLT_PER_UNIT (50u) |
Voltage unit used in PDOs.
| #define CY_PD_VOLT_PER_UNIT_PPS (100u) |
Voltage unit (mV) used in PPS PDOs.
| #define CY_PD_CURRENT_PPS_MULTIPLIER (5u) |
Multiplier used to convert from the current unit used in other PDOs to that used in PPS PDO/RDO.
| #define CY_PD_VOLT_PPS_MULTIPLIER (5u) |
Multiplier used to convert from the voltage unit used in PPS PDO to RDO.
| #define CY_PD_CURRENT_AVS_MULTIPLIER (5u) |
Multiplier used to convert from the current unit used in other PDOs to that used in AVS PDO/RDO.
| #define CY_PD_VOLT_AVS_MULTIPLIER (4u) |
Multiplier used to convert from the voltage unit used in AVS PDO to RDO.
| #define CY_PD_ISAFE_0A (0u) |
VBus current usage = 0 A.
| #define CY_PD_ISAFE_DEF (50u) |
VBus current usage = 0.5 A.
| #define CY_PD_I_0P9A (90u) |
VBus current usage = 0.9 A.
| #define CY_PD_I_1A (100u) |
VBus current usage = 1.0 A.
| #define CY_PD_I_1P5A (150u) |
VBus current usage = 1.5 A.
| #define CY_PD_I_2A (200u) |
VBus current usage = 2.0 A.
| #define CY_PD_I_3A (300u) |
VBus current usage = 3.0 A.
| #define CY_PD_I_4A (400u) |
VBus current usage = 4.0 A.
| #define CY_PD_I_5A (500u) |
VBus current usage = 5.0 A.
| #define CY_PD_CUR_PER_UNIT (10u) |
Current unit used in PDOs.
| #define CY_PD_SNK_DETACH_VBUS_POLL_COUNT (5u) |
Number of VBus checks used to detect detach as the sink.
| #define CY_PD_DRP_TOGGLE_PERIOD (75u) |
Minimum DRP toggling period, in ms.
See Table 4-16 of the Type-C spec Rev1.
| #define CY_PD_SRC_DRP_MIN_DC (30u) |
Minimum percentage of DRP period for a source.
See Table 4-16 of the Type-C spec Rev1.
| #define CY_PD_TYPEC_FSM_NONE (0x00000000u) |
Type-C state machine inactive mode.
| #define CY_PD_TYPEC_FSM_GENERIC (0x00000001u) |
Type-C state machine active mode.
| #define CY_PD_HPD_RX_ACTIVITY_TIMER_PERIOD_MIN (5u) |
Minimum HPD receiver timer period in ms.
| #define CY_PD_HPD_RX_ACTIVITY_TIMER_PERIOD_MAX (105u) |
Maximum HPD receiver timer period in ms.
| #define CY_PD_NO_RESPONSE_TIMER_PERIOD (5000u) |
PD No response timer period in ms.
See Section 6.5.7 of USB PD spec Rev2 v1.2
| #define CY_PD_CBL_POWER_UP_TIMER_PERIOD (55u) |
tVConnStable delay required by cable marker to power up.
| #define CY_PD_CBL_DSC_ID_TIMER_PERIOD (49u) |
Cable discovery timer period in ms.
See Section 6.5.15 of USB PD spec Rev2 v1.2
| #define CY_PD_CBL_DSC_ID_START_TIMER_PERIOD (43u) |
Cable discovery start period in ms.
See Section 6.5.15 of USB PD spec Rev2 v1.2
| #define CY_PD_CBL_DELAY_TIMER_PERIOD (2u) |
Cable delay timer period in ms.
See Section 6.5.14 of USB PD spec Rev2 v1.2
| #define CY_PD_PHY_BUSY_TIMER_PERIOD (15u) |
Period of the timer used internally by stack to prevent PHY lockup in TX state.
| #define CY_PD_HARD_RESET_TX_TIMER_PERIOD (20u) |
Hard reset transmit timer period in ms.
See Section 6.3.13 of USB PD spec Rev2 v1.2
| #define CY_PD_VCONN_SWAP_INITIATOR_TIMER_PERIOD (110u) |
This timer is used by stack to do auto retry VCONN swap before PR swap (if DUT is a sink).
Minimum gap between VCONN swap requests shall be a minimum of 10 ms, to be safe 110 ms is used.
| #define CY_PD_VCONN_SWAP_INITIATOR_DELAY_PERIOD (500u) |
Delay between VConn swap attempts when 5 V supply source is not present.
| #define CY_PD_VBUS_TURN_ON_TIMER_PERIOD (275u) |
VBus ON timer period in ms.
See Table 7-22 of USB PD spec Rev2 v1.2.
| #define CY_PD_EPR_VBUS_TURN_ON_TIMER_PERIOD (700u) |
VBus ON timer period in ms for EPR mode.
| #define CY_PD_VBUS_TURN_OFF_TIMER_PERIOD (625u) |
VBus OFF timer period in ms.
See Table 7-22 of USB PD spec Rev2 v1.2.
| #define CY_PD_PS_SRC_TRANS_TIMER_PERIOD (400u) |
Source transition timer period in ms.
See Section 6.5.6.1 of USB PD spec Rev2 v1.2.
| #define CY_PD_PS_EPR_FIXED_SRC_TRANS_TIMER_PERIOD (860u) |
Src.Trans timer period in ms for EPR fixed.
| #define CY_PD_PS_EPR_AVS_SMALL_SRC_TRANS_TIMER_PERIOD (50u) |
Src.Trans timer period in ms for EPR AVS small.
| #define CY_PD_PS_SRC_OFF_TIMER_PERIOD (900u) |
Source off-timer period in ms.
See Section 6.5.6.2 of USB PD spec Rev2 v1.2.
| #define CY_PD_PS_SRC_ON_TIMER_PERIOD (450u) |
Source on timer period in ms.
See Section 6.5.6.3 of USB PD spec Rev2 v1.2.
| #define CY_PD_PS_SNK_TRANSITION_TIMER_PERIOD (500u) |
Sink transition period in ms.
See Section 6.5.6.1 of USB PD spec Rev2 v1.2
| #define CY_PD_EPR_SRC_RECOVER_TIMER_PERIOD (1250u) |
Src.Recover timer period in ms for EPR mode.
| #define CY_PD_EPR_SRC_RECOVER_TIMER_PERIOD (1250u) |
Src.Recover timer period in ms for EPR mode.
| #define CY_PD_PS_SNK_EPR_TRANSITION_TIMER_PERIOD (925u) |
EPR Snk.
transition period in ms.
| #define CY_PD_PSOURCE_AVS_TRANS_SMALL_PERIOD (50u) |
Time (in ms) allowed for source voltage to become valid.
tAvsSrcTransSmall
| #define CY_PD_PSOURCE_AVS_TRANS_LARGE_PERIOD (700u) |
Time (in ms) allowed for source voltage to become valid.
tAvsSrcTransSmall
| #define CY_PD_SRC_RECOVER_TIMER_PERIOD (800u) |
Source Recover timer period in ms.
See Section 7.6.1 of USB PD spec Rev2 v1.2.
| #define CY_PD_3_SENDER_RESPONSE_TIMER_PERIOD (30u) |
Sender response timeout period in ms for PD3.
See Section 6.6.2 of USB PD spec Rev3 v1.6.
| #define CY_PD_2_SENDER_RESPONSE_TIMER_PERIOD (27u) |
Sender response timeout period in ms for PD2.
See Section 6.6.2 of USB PD spec Rev2 v1.2.
| #define CY_PD_RECEIVER_RESPONSE_TIMER_PERIOD (15u) |
Receiver response timeout period in ms.
See Section 6.5.2 of USB PD spec Rev2 v1.2.
| #define CY_PD_SINK_WAIT_CAP_TIMER_PERIOD (400u) |
Sink wait cap period in ms.
See Section 6.5.4.2 of USB PD spec Rev2 v1.2.
| #define CY_PD_SRC_CAP_TIMER_PERIOD (180u) |
Source cap timer period in ms.
See Section 6.5.4.1 of USB PD spec Rev2 v1.2.
| #define CY_PD_SWAP_SRC_START_TIMER_PERIOD (55u) |
Source start (during PR_SWAP) period in ms.
See Section 6.5.9.2 of USB PD spec Rev2 v1.2.
| #define CY_PD_SOURCE_TRANSITION_TIMER_PERIOD (28u) |
Source voltage transition timer period in ms.
See Table 7-22 of USB PD spec Rev2 v1.2.
| #define CY_PD_VCONN_OFF_TIMER_PERIOD (25u) |
VConn off-timer period in ms.
See Section 6.5.13 of USB PD spec Rev2 v1.2.
| #define CY_PD_VCONN_ON_TIMER_PERIOD (100u) |
VConn on timer period in ms.
| #define CY_PD_UFP_VCONN_DISCHARGE_DURATION (10u) |
Duration for which the UFP discharges VConn during Data_Reset sequence.
| #define CY_PD_VCONN_SRC_DISC_TIMER_PERIOD (200u) |
VConnSourceDischarge timer period.
| #define CY_PD_VCONN_REAPPLIED_TIMER_PERIOD (18u) |
tVConnReapplied period from USB PD specification.
| #define CY_PD_DATA_RESET_TIMER_PERIOD (220u) |
Time between Data_Reset is accepted and Data_Reset_Complete message has to be sent.
| #define CY_PD_DATA_RESET_TIMEOUT_PERIOD (250u) |
Data_Reset_Complete timeout period.
| #define CY_PD_DATA_RESET_COMPLETION_DELAY (225u) |
Delay applied before DFP sends Data_Reset_Complete message.
| #define CY_PD_UFP_DATA_RESET_FAIL_TIMER_PERIOD (500u) |
UFP Data_Reset complete timeout period.
| #define CY_PD_VCONN_TURN_ON_TIMER_PERIOD (10u) |
Period of VConn monitoring checks done internally.
| #define CY_PD_CBL_READY_TIMER_PERIOD (50u) |
This timer is the delay between PD startup and sending a cable to discover the ID request to ensure the cable is ready to respond.
| #define CY_PD_VDM_RESPONSE_TIMER_PERIOD (27u) |
VDM response timer period in ms.
See Section 6.5.12.1 of USB PD spec Rev2 v1.2.
| #define CY_PD_VDM_ENTER_MODE_RESPONSE_TIMER_PERIOD (45u) |
Enter mode response timeout period in ms.
See Section 6.5.12.2 of USB PD Spec Rev2 v1.2.
| #define CY_PD_VDM_EXIT_MODE_RESPONSE_TIMER_PERIOD (45u) |
Exit mode response timeout period in ms.
See Section 6.5.12.3 of USB PD spec Rev2 v1.2.
| #define CY_PD_DPM_RESP_REC_RESP_PERIOD (20u) |
VDM receiver response timer period in ms.
See Section 6.5.12.1 of USB PD spec Rev2 v1.2. This timer is slightly relaxed from the spec value.
| #define CY_PD_BIST_CONT_MODE_TIMER_PERIOD (55u) |
BIST continuous mode period in ms.
See Section 6.5.8.4 of USB PD spec Rev2 v1.2.
| #define CY_PD_SINK_VBUS_TURN_OFF_TIMER_PERIOD (750u) |
Time in ms allowed for VBus to turn OFF during hard reset.
| #define CY_PD_SINK_CY_PD_VBUS_TURN_ON_TIMER_PERIOD (1300u) |
Time in ms allowed for VBus to turn on during hard reset.
| #define CY_PD_PS_HARD_RESET_TIMER_PERIOD (27u) |
Hard reset timer period in ms.
See Section 6.5.11.2 of USB PD spec Rev2 v1.2.
| #define CY_PD_COLLISION_SRC_COOL_OFF_TIMER_PERIOD (5u) |
Time for which PD 3.0 source will keep Rp as SinkTxNG after returning to Ready state.
| #define CY_PD_SINK_TX_TIMER_PERIOD (18u) |
Delay between AMS initiation attempts by PD 3.0 sink while Rp = SinkTxNG.
| #define CY_PD_PPS_SRC_TIMER_PERIOD (14000u) |
PPS timer period in ms.
| #define CY_PD_TYPEC_CC_DEBOUNCE_TIMER_PERIOD (140u) |
CC debounce period in ms from Type-C spec.
| #define CY_PD_TYPEC_PD_DEBOUNCE_TIMER_PERIOD (11u) |
PD debounce period in ms.
| #define CY_PD_TYPEC_RD_DEBOUNCE_TIMER_PERIOD (12u) |
Rd debounce period (detach detection) in ms.
| #define CY_PD_TYPEC_ATTACH_WAIT_ENTRY_DELAY_PERIOD (10u) |
Delay between Attached.Wait state entry and start of checks for detached status.
| #define CY_PD_TYPEC_SRC_DETACH_DEBOUNCE_PERIOD (2u) |
Debounce period used to detect detach when it is the source.
| #define CY_PD_TYPEC_PD3_RPCHANGE_DEBOUNCE_PERIOD (2u) |
Period in ms used to detect Rp change in a PD 3.0 contract.
| #define CY_PD_TYPEC_ERROR_RECOVERY_TIMER_PERIOD (250u) |
Type-C error recovery timer period in ms.
| #define CY_PD_TYPEC_DRP_TRY_TIMER_PERIOD (110u) |
Type-C try DRP timer period in ms.
| #define CY_PD_TYPEC_TRY_TIMEOUT_PERIOD (800u) |
Type-C try timeout timer period in ms.
| #define CY_PD_SLN_STATUS_CHECK_PERIOD (10u) |
Period in ms to check whether the solution state allows to move forward with Type-C connection.
| #define CY_PD_CHUNK_SENDER_REQUEST_TIMER_PERIOD (27u) |
Chunk sender request timeout period in ms.
| #define CY_PD_CHUNK_SENDER_RESPONSE_TIMER_PERIOD (27u) |
Chunk sender response timeout period in ms.
| #define CY_PD_CHUNK_RECEIVER_REQUEST_TIMER_PERIOD (15u) |
Chunk received request timeout period in ms.
| #define CY_PD_CHUNK_RECEIVER_RESPONSE_TIMER_PERIOD (15u) |
Chunk receiver response timeout period in ms.
| #define CY_PD_FRS_TX_ENABLE_MASK (0x02u) |
FRS transmit enable flag in the config table setting.
| #define CY_PD_FRS_RX_ENABLE_MASK (0x01u) |
FRS receive enable flag in the config table setting.
| #define CY_PD_EXT_SRCCAP_SIZE (25u) |
Size of extended source capabilities message in bytes.
| #define CY_PD_EXT_SRCCAP_BUF_SIZE (28u) |
Size of extended source capabilities message buffer.
| #define CY_PD_EXT_SRCCAP_INP_INDEX (21u) |
Index of source inputs field in extended source caps.
| #define CY_PD_EXT_SRCCAP_INP_UNCONSTRAINED (0x02u) |
Mask for unconstrained source input in extended source caps.
| #define CY_PD_EXT_SRCCAP_PDP_INDEX (23u) |
Index of PDP field in extended source caps.
| #define CY_PD_EXT_SPR_SRCCAP_PDP_INDEX (23u) |
Index of SPR PDP field in extended source caps.
| #define CY_PD_EXT_EPR_SRCCAP_PDP_INDEX (24u) |
Index of EPR PDP field in extended source caps.
| #define CY_PD_EXT_SNKCAP_SIZE (24u) |
Size of extended sink cap message in bytes.
| #define CY_PD_EXT_SNKCAP_BUF_SIZE (28u) |
Size of the buffer allocated for extended sink cap data.
| #define CY_PD_EXT_SNKCAP_VERS_INDEX (10u) |
Offset of SKEDB version field in Ext.
Snk Cap. This field must be non-zero for a valid response.
| #define CY_PD_EXT_STATUS_SIZE (7u) |
Size of status extended message in bytes.
| #define CY_PD_EXT_PPS_STATUS_SIZE (4u) |
Size of PPS status extended message in bytes.
| #define CY_PD_EXT_SNKCAP_EPRPDP_INDEX (22u) |
Index of EPR PDP field in extended sink caps.
| #define CY_PD_EXTERNALLY_POWERED_BIT_POS (7u) |
Externally powered bit position in source PDO mask.
| #define CY_PD_FLAG_CONTRACT_NEG_ACTIVE (1u) |
Status field indicating that contract negotiation is in progress.
| #define CY_PD_FLAG_EXPLICIT_CONTRACT (2u) |
Status field indicating that explicit contract is present.
| #define CY_PD_FLAG_SRC_READY (4u) |
Status field indicating that source is ready.
| #define CY_PD_FLAG_POWER_SINK (8u) |
Status field indicating that the port is currently a sink.
| #define CY_PD_CC_STAT_ZOPEN (0u) |
CC line status: ZOpen.
| #define CY_PD_CC_STAT_DRP_TOGGLE (1u) |
CC line status: DRP toggle in progress.
| #define CY_PD_CC_STAT_RD_PRESENT (2u) |
CC line status: Rd is applied.
| #define CY_PD_CC_STAT_RP_PRESENT (4u) |
CC line status: Rp is applied.
| #define CY_PD_CC_STAT_VCONN_ACTIVE (8u) |
CC line status: VConn is applied.
| #define CY_PD_DPM_ERROR_NONE (0u) |
No additional DPM error information is available.
| #define CY_PD_DPM_ERROR_NO_VCONN (1u) |
DPM command failed because of the absence of VConn.
| #define CY_PD_USB4_EUDO_USB4_EN_MASK (0x26000000u) |
Enter USB DO USB4 mode mask.
| #define CY_PD_USB_MODE_USB4 (2u) |
USB4 data mode as defined in entering USB DO.
| #define CY_PD_USB_MODE_USB3 (1u) |
USB 3.2 data mode as defined in entering USB DO.
| #define CY_PD_USB_MODE_USB2 (0u) |
USB 2.0 data mode as defined in entering USB DO.
| #define CY_PD_TBT_GEN_3 (3u) |
TBT Gen 3 cable identifier in the TBT cable disc mode VDO response.
| #define CY_PD_UFP_VDO_1_RECFG_ALT_MODE_PARAM_MASK (0x20u) |
TBT Gen 3 cable identifier in the TBT cable disc mode VDO response.
| #define CY_PD_DP_HPD_TYPE_GPIO (0u) |
GPIO based HPD configuration.
| #define CY_PD_DP_HPD_TYPE_VIRTUAL (1u) |
Virtual (I2C based) HPD configuration.
| #define CY_PD_HOST_SBU_CFG_FULL (0u) |
Full (AUX/LSXX and polarity) selection for SBU MUX.
| #define CY_PD_HOST_SBU_CFG_FIXED_POL (1u) |
SBU MUX (AUX/LSXX) connection without polarity switch.
| #define CY_PD_HOST_SBU_CFG_PASS_THROUGH (2u) |
Pass through SBU MUX (AUX only) connection.
| #define CY_PD_PDO_UNCONSTRAINED_BIT_MASK (0x80u) |
Unconstrained bit mask.