Universal Serial Bus Host (USBH)

Data Structures
struct	XMC_USBH0_DEVICE_t
struct	XMC_USBH0_pipe_t
struct	XMC_USBH_CAPABILITIES_t
struct	XMC_USBH_DRIVER_t
struct	XMC_USBH_DRIVER_VERSION_t
struct	XMC_USBH_PORT_STATE_t

Macros
#define	USB_CH_HCCHARx_DEVADDR(x)   (((uint32_t) x << USB_CH_HCCHAR_DevAddr_Pos) & (uint32_t)USB_CH_HCCHAR_DevAddr_Msk)
#define	USB_CH_HCCHARx_EPDIR(x)   (((uint32_t) x << USB_CH_HCCHAR_EPDir_Pos) & (uint32_t)USB_CH_HCCHAR_EPDir_Msk)
#define	USB_CH_HCCHARx_EPNUM(x)   (((uint32_t) x << USB_CH_HCCHAR_EPNum_Pos) & (uint32_t)USB_CH_HCCHAR_EPNum_Msk)
#define	USB_CH_HCCHARx_EPTYPE(x)   (((uint32_t) x << USB_CH_HCCHAR_EPType_Pos) & (uint32_t)USB_CH_HCCHAR_EPType_Msk)
#define	USB_CH_HCCHARx_MCEC(x)   (((uint32_t) x << USB_CH_HCCHAR_MC_EC_Pos) & (uint32_t)USB_CH_HCCHAR_MC_EC_Msk)
#define	USB_CH_HCCHARx_MPS(x)   (((uint32_t) x ) & (uint32_t)USB_CH_HCCHAR_MPS_Msk)
#define	USB_CH_HCFG_FSLSPCS(x)   (((uint32_t) x ) & USB_HCFG_FSLSPclkSel_Msk)
#define	USB_CH_HCFG_FSLSSUP(x)   (((uint32_t) x << USB_HCFG_FSLSSupp_Pos) & USB_HCFG_FSLSSupp_Msk)
#define	USB_CH_HCINTx_ALL
#define	USB_CH_HCINTx_ERRORS
#define	USB_CH_HCTSIZx_DPID(x)   (((uint32_t) x << USB_CH_HCTSIZ_BUFFERMODE_Pid_Pos) & (uint32_t)USB_CH_HCTSIZ_BUFFERMODE_Pid_Msk)
#define	USB_CH_HCTSIZx_DPID_DATA0   (USB_CH_HCTSIZx_DPID(0U))
#define	USB_CH_HCTSIZx_DPID_DATA1   (USB_CH_HCTSIZx_DPID(2U))
#define	USB_CH_HCTSIZx_DPID_DATA2   (USB_CH_HCTSIZx_DPID(1U))
#define	USB_CH_HCTSIZx_DPID_MDATA   (USB_CH_HCTSIZx_DPID(3U))
#define	USB_CH_HCTSIZx_DPID_SETUP   (USB_CH_HCTSIZx_DPID(3U))
#define	USB_GRXSTSR_HOSTMODE_PktSts_IN_DATA_PKT   0x2
#define	USB_GRXSTSR_HOSTMODE_PktSts_IN_TRSF_CPL   0x3
#define	USBH0_MAX_PIPE_NUM   (14U)
#define	USBH_PIPE_GET_INDEX(handle)   (((uint32_t)handle - (uint32_t)USB0_CH0_BASE)/(0x20U))
#define	XMC_USB_DRIVE_PORT1   P3_2
#define	XMC_USB_DRIVE_PORT2   P0_1
#define	XMC_USBH_API_VERSION   ((uint16_t)((uint16_t)XMC_LIB_MAJOR_VERSION << 8U) |XMC_LIB_MINOR_VERSION)
#define	XMC_USBH_CLOCK_GATING_DISABLE   0
#define	XMC_USBH_CLOCK_GATING_ENABLE   1
#define	XMC_USBH_DRIVER_ERROR   -1
#define	XMC_USBH_DRIVER_ERROR_BUSY   -2
#define	XMC_USBH_DRIVER_ERROR_PARAMETER   -5
#define	XMC_USBH_DRIVER_ERROR_SPECIFIC   -6
#define	XMC_USBH_DRIVER_ERROR_TIMEOUT   -3
#define	XMC_USBH_DRIVER_ERROR_UNSUPPORTED   -4
#define	XMC_USBH_DRIVER_OK   0
#define	XMC_USBH_ENDPOINT_BULK   2
#define	XMC_USBH_ENDPOINT_CONTROL   0
#define	XMC_USBH_ENDPOINT_INTERRUPT   3
#define	XMC_USBH_ENDPOINT_ISOCHRONOUS   1
#define	XMC_USBH_EP_HANDLE   XMC_USBH_PIPE_HANDLE
#define	XMC_USBH_EVENT_BUS_ERROR   (1UL << 6)
#define	XMC_USBH_EVENT_CONNECT   (1UL << 0)
#define	XMC_USBH_EVENT_DISCONNECT   (1UL << 1)
#define	XMC_USBH_EVENT_HANDSHAKE_ERR   (1UL << 5)
#define	XMC_USBH_EVENT_HANDSHAKE_MDATA   (1UL << 3)
#define	XMC_USBH_EVENT_HANDSHAKE_NAK   (1UL << 1)
#define	XMC_USBH_EVENT_HANDSHAKE_NYET   (1UL << 2)
#define	XMC_USBH_EVENT_HANDSHAKE_STALL   (1UL << 4)
#define	XMC_USBH_EVENT_OVERCURRENT   (1UL << 2)
#define	XMC_USBH_EVENT_REMOTE_WAKEUP   (1UL << 6)
#define	XMC_USBH_EVENT_RESET   (1UL << 3)
#define	XMC_USBH_EVENT_RESUME   (1UL << 5)
#define	XMC_USBH_EVENT_SUSPEND   (1UL << 4)
#define	XMC_USBH_EVENT_TRANSFER_COMPLETE   (1UL << 0)
#define	XMC_USBH_PACKET_CSPLIT   (0x0CUL << XMC_USBH_PACKET_SPLIT_Pos)
#define	XMC_USBH_PACKET_DATA0   (0x01UL << XMC_USBH_PACKET_DATA_Pos)
#define	XMC_USBH_PACKET_DATA1   (0x02UL << XMC_USBH_PACKET_DATA_Pos)
#define	XMC_USBH_PACKET_DATA_Msk   (0x0FUL << XMC_USBH_PACKET_DATA_Pos)
#define	XMC_USBH_PACKET_DATA_Pos   4
#define	XMC_USBH_PACKET_IN   (0x03UL << XMC_USBH_PACKET_TOKEN_Pos)
#define	XMC_USBH_PACKET_OUT   (0x02UL << XMC_USBH_PACKET_TOKEN_Pos)
#define	XMC_USBH_PACKET_PING   (0x04UL << XMC_USBH_PACKET_TOKEN_Pos)
#define	XMC_USBH_PACKET_PRE   (1UL << 12)
#define	XMC_USBH_PACKET_SETUP   (0x01UL << XMC_USBH_PACKET_TOKEN_Pos)
#define	XMC_USBH_PACKET_SSPLIT   (0x08UL << XMC_USBH_PACKET_SPLIT_Pos)
#define	XMC_USBH_PACKET_SSPLIT_E   (0x0AUL << XMC_USBH_PACKET_SPLIT_Pos)
#define	XMC_USBH_PACKET_SSPLIT_S   (0x09UL << XMC_USBH_PACKET_SPLIT_Pos)
#define	XMC_USBH_PACKET_SSPLIT_S_E   (0x0BUL << XMC_USBH_PACKET_SPLIT_Pos)
#define	XMC_USBH_PACKET_TOKEN_Msk   (0x0FUL << XMC_USBH_PACKET_TOKEN_Pos)
#define	XMC_USBH_PACKET_TOKEN_Pos   0
#define	XMC_USBH_SignalEndpointEvent_t   XMC_USBH_SignalPipeEvent_t
#define	XMC_USBH_SPEED_FULL   1U
#define	XMC_USBH_SPEED_HIGH   2U
#define	XMC_USBH_SPEED_LOW   0U

Typedefs
typedef void(*	XMC_USBH_SignalPipeEvent_t) (XMC_USBH_PIPE_HANDLE pipe_hndl, uint32_t event)
typedef void(*	XMC_USBH_SignalPortEvent_t) (uint8_t port, uint32_t event)

Functions
uint32_t	XMC_USBH_GetInterruptStatus (void)
void	XMC_USBH_HandleIrq (uint32_t gintsts)
uint8_t	XMC_USBH_osDelay (uint32_t ms)
void	XMC_USBH_Select_VBUS (XMC_GPIO_PORT_t *port, uint32_t pin)
void	XMC_USBH_TurnOffResumeBit (void)

Detailed Description

The USBH is the host mode device driver for the USB0 hardware module on XMC4000 family of microcontrollers. The USB0 module can be used to establish a USB interface between outside world and XMC4000 family of controllers. The USB module includes the following features in host mode:

1. Complies with the USB 2.0 Specification.
2. Supports up to 14 bidirectional pipes, including control pipe 0.
3. Supports SOFs in Full-Speed modes.
4. Supports clock gating for power saving.
5. Supports FIFO mode data transaction.

The below figure shows the overview of USB0 module in XMC4 microntroller.

The USBH device driver supports the following features:

1. Initialize/Uninitialize the USB0 module on XMC4000 device.
2. Control VBUS state.
3. Reset USB port.
4. Set the USB device address.
5. Allocate pipe for new endpoint communication.
6. Modify an existing pipe.
7. Transfer data on selected pipe.
8. Abort ongoing data transaction.
9. Handle multi packet data transaction by updating toggle information.

The USBH device driver expects registration of callback functions XMC_USBH_SignalPortEvent_t and XMC_USBH_SignalPipeEvent_t to be executed when there is port event interrupt and pipe event interrupt respectively.
The USBH driver is CMSIS API compatible. Please use Driver_USBH0 to access the USBH API.
For example, to initialize the USB host controller, use Driver_USBH0.Initialize().

Macro Definition Documentation

USB_CH_HCCHARx_DEVADDR

#define USB_CH_HCCHARx_DEVADDR

(

x

)

(((uint32_t) x << USB_CH_HCCHAR_DevAddr_Pos) & (uint32_t)USB_CH_HCCHAR_DevAddr_Msk)

Shifts the value to the position of endpoint type(EPType) in the HCCHAR register

USB_CH_HCCHARx_EPDIR

#define USB_CH_HCCHARx_EPDIR

(

x

)

(((uint32_t) x << USB_CH_HCCHAR_EPDir_Pos) & (uint32_t)USB_CH_HCCHAR_EPDir_Msk)

Shifts the value to the position of endpoint direction(EPDir) in the HCCHAR register

USB_CH_HCCHARx_EPNUM

#define USB_CH_HCCHARx_EPNUM

(

x

)

(((uint32_t) x << USB_CH_HCCHAR_EPNum_Pos) & (uint32_t)USB_CH_HCCHAR_EPNum_Msk)

Shifts the value to the position of endpoint number(EPNum) in the HCCHAR register

USB_CH_HCCHARx_EPTYPE

#define USB_CH_HCCHARx_EPTYPE

(

x

)

(((uint32_t) x << USB_CH_HCCHAR_EPType_Pos) & (uint32_t)USB_CH_HCCHAR_EPType_Msk)

Shifts the value to the position of endpoint type(EPType) in the HCCHAR register

USB_CH_HCCHARx_MCEC

#define USB_CH_HCCHARx_MCEC

(

x

)

(((uint32_t) x << USB_CH_HCCHAR_MC_EC_Pos) & (uint32_t)USB_CH_HCCHAR_MC_EC_Msk)

Shifts the value to the position of multi-count(MC_EC) field in the HCCHAR register

USB_CH_HCCHARx_MPS

#define USB_CH_HCCHARx_MPS

(

x

)

(((uint32_t) x ) & (uint32_t)USB_CH_HCCHAR_MPS_Msk)

Masks maximum packet size information from the HCCHAR register value provided as input

USB_CH_HCFG_FSLSPCS

#define USB_CH_HCFG_FSLSPCS

(

x

)

(((uint32_t) x ) & USB_HCFG_FSLSPclkSel_Msk)

Provides register value to update PHY clock selection in register HCFG

USB_CH_HCFG_FSLSSUP

#define USB_CH_HCFG_FSLSSUP

(

x

)

(((uint32_t) x << USB_HCFG_FSLSSupp_Pos) & USB_HCFG_FSLSSupp_Msk)

Provides register value to update USB full speed related mask FLSSupp of register HCFG

USB_CH_HCINTx_ALL

#define USB_CH_HCINTx_ALL

Value:

(USB_CH_HCINTMSK_XferComplMsk_Msk | \
                                                      USB_CH_HCINTMSK_ChHltdMsk_Msk | \
                                                      USB_CH_HCINTMSK_StallMsk_Msk | \
                                                      USB_CH_HCINTMSK_NakMsk_Msk | \
                                                      USB_CH_HCINTMSK_AckMsk_Msk | \
                                                      USB_CH_HCINTMSK_XactErrMsk_Msk | \
                                                      USB_CH_HCINTMSK_BblErrMsk_Msk | \
                                                      USB_CH_HCINTMSK_FrmOvrunMsk_Msk | \
                                                      USB_CH_HCINTMSK_DataTglErrMsk_Msk)

Mask for selecting all channel related events

USB_CH_HCINTx_ERRORS

#define USB_CH_HCINTx_ERRORS

Value:

(USB_CH_HCINTMSK_XactErrMsk_Msk | \
                                                      USB_CH_HCINTMSK_BblErrMsk_Msk | \
                                                      USB_CH_HCINTMSK_FrmOvrunMsk_Msk | \
                                                      USB_CH_HCINTMSK_DataTglErrMsk_Msk)

Mask for selecting all channel error related events

USB_CH_HCTSIZx_DPID

#define USB_CH_HCTSIZx_DPID

(

x

)

(((uint32_t) x << USB_CH_HCTSIZ_BUFFERMODE_Pid_Pos) & (uint32_t)USB_CH_HCTSIZ_BUFFERMODE_Pid_Msk)

Shifts the value to the position of packet ID (PID) in the HCTSIZ register

USB_CH_HCTSIZx_DPID_DATA0

#define USB_CH_HCTSIZx_DPID_DATA0   (USB_CH_HCTSIZx_DPID(0U))

Represents DATA toggle DATA0 as in HCTSIZ register

USB_CH_HCTSIZx_DPID_DATA1

#define USB_CH_HCTSIZx_DPID_DATA1   (USB_CH_HCTSIZx_DPID(2U))

Represents DATA toggle DATA1 as in HCTSIZ register

USB_CH_HCTSIZx_DPID_DATA2

#define USB_CH_HCTSIZx_DPID_DATA2   (USB_CH_HCTSIZx_DPID(1U))

Represents DATA toggle DATA2 as in HCTSIZ register

USB_CH_HCTSIZx_DPID_MDATA

#define USB_CH_HCTSIZx_DPID_MDATA   (USB_CH_HCTSIZx_DPID(3U))

Represents DATA toggle MDATA as in HCTSIZ register

USB_CH_HCTSIZx_DPID_SETUP

#define USB_CH_HCTSIZx_DPID_SETUP   (USB_CH_HCTSIZx_DPID(3U))

Represents SETUP token as in HCTSIZ register

USB_GRXSTSR_HOSTMODE_PktSts_IN_DATA_PKT

#define USB_GRXSTSR_HOSTMODE_PktSts_IN_DATA_PKT   0x2

Represents IN data token as in receive status pop register(GRXSTSP)

USB_GRXSTSR_HOSTMODE_PktSts_IN_TRSF_CPL

#define USB_GRXSTSR_HOSTMODE_PktSts_IN_TRSF_CPL   0x3

Represents paket status information as in receive status pop register(GRXSTSP)

USBH0_MAX_PIPE_NUM

#define USBH0_MAX_PIPE_NUM   (14U)

Representation of number of pipes available

USBH_PIPE_GET_INDEX

#define USBH_PIPE_GET_INDEX

(

handle

)

(((uint32_t)handle - (uint32_t)USB0_CH0_BASE)/(0x20U))

Macro provides index of the USB channel based on its base address

XMC_USB_DRIVE_PORT1

#define XMC_USB_DRIVE_PORT1   P3_2

Default port(PORT3, pin 2) used to enable VBUS voltage regulator on the board

XMC_USB_DRIVE_PORT2

#define XMC_USB_DRIVE_PORT2   P0_1

Alternate port that can be used to enable VBUS voltage regulator(PORT0, pin 1)

XMC_USBH_API_VERSION

#define XMC_USBH_API_VERSION   ((uint16_t)((uint16_t)XMC_LIB_MAJOR_VERSION << 8U) |XMC_LIB_MINOR_VERSION)

USBH low level driver API version

XMC_USBH_CLOCK_GATING_DISABLE

#define XMC_USBH_CLOCK_GATING_DISABLE   0

Used to disable clock gating when the driver is fully powered

XMC_USBH_CLOCK_GATING_ENABLE

#define XMC_USBH_CLOCK_GATING_ENABLE   1

Used to enable clock gating when the driver is powered down

XMC_USBH_DRIVER_ERROR

#define XMC_USBH_DRIVER_ERROR   -1

Unspecified error

XMC_USBH_DRIVER_ERROR_BUSY

#define XMC_USBH_DRIVER_ERROR_BUSY   -2

Driver is busy

XMC_USBH_DRIVER_ERROR_PARAMETER

#define XMC_USBH_DRIVER_ERROR_PARAMETER   -5

Parameter error

XMC_USBH_DRIVER_ERROR_SPECIFIC

#define XMC_USBH_DRIVER_ERROR_SPECIFIC   -6

Start of driver specific errors

XMC_USBH_DRIVER_ERROR_TIMEOUT

#define XMC_USBH_DRIVER_ERROR_TIMEOUT   -3

Timeout occurred

XMC_USBH_DRIVER_ERROR_UNSUPPORTED

#define XMC_USBH_DRIVER_ERROR_UNSUPPORTED   -4

Operation not supported

XMC_USBH_DRIVER_OK

#define XMC_USBH_DRIVER_OK   0

Operation succeeded

XMC_USBH_ENDPOINT_BULK

#define XMC_USBH_ENDPOINT_BULK   2

Bulk Endpoint

XMC_USBH_ENDPOINT_CONTROL

#define XMC_USBH_ENDPOINT_CONTROL   0

Control Endpoint

XMC_USBH_ENDPOINT_INTERRUPT

#define XMC_USBH_ENDPOINT_INTERRUPT   3

Interrupt Endpoint

XMC_USBH_ENDPOINT_ISOCHRONOUS

#define XMC_USBH_ENDPOINT_ISOCHRONOUS   1

Isochronous Endpoint

XMC_USBH_EP_HANDLE

#define XMC_USBH_EP_HANDLE   XMC_USBH_PIPE_HANDLE

Legacy name for pipe handle used by CMSIS

XMC_USBH_EVENT_BUS_ERROR

#define XMC_USBH_EVENT_BUS_ERROR   (1UL << 6)

Bus Error detected

XMC_USBH_EVENT_CONNECT

#define XMC_USBH_EVENT_CONNECT   (1UL << 0)

USB Device Connected to Port

XMC_USBH_EVENT_DISCONNECT

#define XMC_USBH_EVENT_DISCONNECT   (1UL << 1)

USB Device Disconnected from Port

XMC_USBH_EVENT_HANDSHAKE_ERR

#define XMC_USBH_EVENT_HANDSHAKE_ERR   (1UL << 5)

ERR Handshake received

XMC_USBH_EVENT_HANDSHAKE_MDATA

#define XMC_USBH_EVENT_HANDSHAKE_MDATA   (1UL << 3)

MDATA Handshake received

XMC_USBH_EVENT_HANDSHAKE_NAK

#define XMC_USBH_EVENT_HANDSHAKE_NAK   (1UL << 1)

NAK Handshake received

XMC_USBH_EVENT_HANDSHAKE_NYET

#define XMC_USBH_EVENT_HANDSHAKE_NYET   (1UL << 2)

NYET Handshake received

XMC_USBH_EVENT_HANDSHAKE_STALL

#define XMC_USBH_EVENT_HANDSHAKE_STALL   (1UL << 4)

STALL Handshake received

XMC_USBH_EVENT_OVERCURRENT

#define XMC_USBH_EVENT_OVERCURRENT   (1UL << 2)

USB Device caused Overcurrent

XMC_USBH_EVENT_REMOTE_WAKEUP

#define XMC_USBH_EVENT_REMOTE_WAKEUP   (1UL << 6)

USB Device activated Remote Wakeup

XMC_USBH_EVENT_RESET

#define XMC_USBH_EVENT_RESET   (1UL << 3)

USB Reset completed

XMC_USBH_EVENT_RESUME

#define XMC_USBH_EVENT_RESUME   (1UL << 5)

USB Resume occurred

XMC_USBH_EVENT_SUSPEND

#define XMC_USBH_EVENT_SUSPEND   (1UL << 4)

USB Suspend occurred

XMC_USBH_EVENT_TRANSFER_COMPLETE

#define XMC_USBH_EVENT_TRANSFER_COMPLETE   (1UL << 0)

Transfer completed

XMC_USBH_PACKET_CSPLIT

#define XMC_USBH_PACKET_CSPLIT   (0x0CUL << XMC_USBH_PACKET_SPLIT_Pos)

CSPLIT Packet

XMC_USBH_PACKET_DATA0

#define XMC_USBH_PACKET_DATA0   (0x01UL << XMC_USBH_PACKET_DATA_Pos)

DATA0 PID

XMC_USBH_PACKET_DATA1

#define XMC_USBH_PACKET_DATA1   (0x02UL << XMC_USBH_PACKET_DATA_Pos)

DATA1 PID

XMC_USBH_PACKET_DATA_Msk

#define XMC_USBH_PACKET_DATA_Msk   (0x0FUL << XMC_USBH_PACKET_DATA_Pos)

Packet data PID mask

XMC_USBH_PACKET_DATA_Pos

#define XMC_USBH_PACKET_DATA_Pos   4

Packet data PID position

XMC_USBH_PACKET_IN

#define XMC_USBH_PACKET_IN   (0x03UL << XMC_USBH_PACKET_TOKEN_Pos)

IN Packet

XMC_USBH_PACKET_OUT

#define XMC_USBH_PACKET_OUT   (0x02UL << XMC_USBH_PACKET_TOKEN_Pos)

OUT Packet

XMC_USBH_PACKET_PING

#define XMC_USBH_PACKET_PING   (0x04UL << XMC_USBH_PACKET_TOKEN_Pos)

PING Packet

XMC_USBH_PACKET_PRE

#define XMC_USBH_PACKET_PRE   (1UL << 12)

PRE Token

XMC_USBH_PACKET_SETUP

#define XMC_USBH_PACKET_SETUP   (0x01UL << XMC_USBH_PACKET_TOKEN_Pos)

SETUP Packet

XMC_USBH_PACKET_SSPLIT

#define XMC_USBH_PACKET_SSPLIT   (0x08UL << XMC_USBH_PACKET_SPLIT_Pos)

SSPLIT Packet

XMC_USBH_PACKET_SSPLIT_E

#define XMC_USBH_PACKET_SSPLIT_E   (0x0AUL << XMC_USBH_PACKET_SPLIT_Pos)

SSPLIT Packet: Data End

XMC_USBH_PACKET_SSPLIT_S

#define XMC_USBH_PACKET_SSPLIT_S   (0x09UL << XMC_USBH_PACKET_SPLIT_Pos)

SSPLIT Packet: Data Start

XMC_USBH_PACKET_SSPLIT_S_E

#define XMC_USBH_PACKET_SSPLIT_S_E   (0x0BUL << XMC_USBH_PACKET_SPLIT_Pos)

SSPLIT Packet: Data All

XMC_USBH_PACKET_TOKEN_Msk

#define XMC_USBH_PACKET_TOKEN_Msk   (0x0FUL << XMC_USBH_PACKET_TOKEN_Pos)

Packet token mask

XMC_USBH_PACKET_TOKEN_Pos

#define XMC_USBH_PACKET_TOKEN_Pos   0

Packet token position

XMC_USBH_SignalEndpointEvent_t

#define XMC_USBH_SignalEndpointEvent_t   XMC_USBH_SignalPipeEvent_t

Legacy name for the pipe event handler

XMC_USBH_SPEED_FULL

#define XMC_USBH_SPEED_FULL   1U

Full-speed USB

XMC_USBH_SPEED_HIGH

#define XMC_USBH_SPEED_HIGH   2U

High-speed USB

XMC_USBH_SPEED_LOW

#define XMC_USBH_SPEED_LOW   0U

Low-speed USB

Typedef Documentation

XMC_USBH_SignalPipeEvent_t

typedef void(* XMC_USBH_SignalPipeEvent_t) (XMC_USBH_PIPE_HANDLE pipe_hndl, uint32_t event)

Pointer to ARM_USBH_SignalPipeEvent : Signal Pipe Event.

XMC_USBH_SignalPortEvent_t

typedef void(* XMC_USBH_SignalPortEvent_t) (uint8_t port, uint32_t event)

Pointer to ARM_USBH_SignalPortEvent : Signal Root HUB Port Event.

Enumeration Type Documentation

XMC_USBH_POWER_STATE_t

enum XMC_USBH_POWER_STATE_t

General power states of USB peripheral driver.

Enumerator
XMC_USBH_POWER_OFF	Power off: no operation possible
XMC_USBH_POWER_LOW	Low Power mode: retain state, detect and signal wake-up events
XMC_USBH_POWER_FULL	Power on: full operation at maximum performance

Function Documentation

XMC_USBH_GetInterruptStatus()

uint32_t XMC_USBH_GetInterruptStatus

(

void

)

Returns

USB host mode interrupt status. Bit field USB0_BASE->GINTSTS_HOSTMODE

Description:

Provides USB host global interrupt status.
This value can be used to provide interrupt status to the IRQ handler function XMC_USBH_HandleIrq().

XMC_USBH_HandleIrq()

void XMC_USBH_HandleIrq

(

uint32_t

gintsts

)

Parameters

gintsts

USB global interrupt status.

Returns

None.

Description:

Updates logical state of the USB host driver based on the input status value. It handles port interrupt and channel interrupt. It responsible for updating data toggle information for multi-packet data transmission. It executes the callback function on transfer completion and reception of data. It also does error management and calls the relevant callback functions to indicate it to the application.

XMC_USBH_osDelay()

uint8_t XMC_USBH_osDelay

(

uint32_t

ms

)

Parameters

ms	Delay in milliseconds.

Returns

uint8_t Value has no significance for the low level driver.

Description:

Function implements time delay logic. The USB host low level driver provides a weak definition for delay which has to re-implemented with time delay logic. The low level driver expects blocking implementation of the delay.

XMC_USBH_Select_VBUS()

void XMC_USBH_Select_VBUS	(	XMC_GPIO_PORT_t *	port,
		uint32_t	pin
	)

Parameters

port	Address of the port which has the pin used to enable VBUS charge pump.
pin	Pin number in the port selected in previous argument using which the VBUS charge pump has to be enabled.

Returns

None

Description:

Configures the port pin with alternate output function 1. VBUS enabling pins work with alternate output function 1.
Note:The input port pin should support USB VBUS as an alternate function.
Typical ports that support VBUS enable are: P3_2 and P0_1.

XMC_USBH_TurnOffResumeBit()

void XMC_USBH_TurnOffResumeBit

(

void

)

Returns

None

Description:

De-asserts resume bit.
The function shall be called 20ms after detecting port remote wakeup event.