ECC hardware can correct single-bit (correctable) memory errors and report double-bit (non-correctable) memory errors through SysFault.
The STL ECC self-test APIs validate the non-correctable fault-reporting path by injecting ECC corruption and verifying the expected SysFault source.
Test sequence used by the APIs:
API applicability:
| API | Device Family | Memory under test | Address requirement |
|---|---|---|---|
| SelfTest_ECC | XMC | Flash | Internal test address is used |
| SelfTest_ECC_Flash | PSOC Control | Flash | Flash row-aligned address |
| SelfTest_ECC_Ram | PSOC Control | RAM | Valid SRAM address |
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