Macros | |
| #define | MTB_PMBUS_ERR_RD_TOO_MANY_BYTES (0x01U) |
| Controller attempts to read too many bytes. | |
| #define | MTB_PMBUS_ERR_WR_TOO_MANY_BYTES (0x02U) |
| Controller attempts to write too many bytes. | |
| #define | MTB_PMBUS_ERR_UNSUPPORTED_CMD (0x04U) |
| Received command is unsupported. | |
| #define | MTB_PMBUS_ERR_WR_LESS_BYTES (0x08U) |
| Controller writes less byte than expected. | |
| #define | MTB_PMBUS_ERR_RD_LESS_BYTES (0x10U) |
| Controller read less byte than expected. | |
| #define | MTB_PMBUS_ERR_TIMEOUT (0x20U) |
| Bus reset timeout occurred. | |
| #define | MTB_PMBUS_ERR_CORRUPTED_DATA (0x40U) |
| Received PEC does not match. | |
| #define | MTB_PMBUS_ERR_WR_AFTER_SECOND_ADDR (0x80U) |
| Controller attempts to write data after the second address match. | |
| #define | MTB_PMBUS_ERR_BYTE_COUNT_TOO_BIG (0x100U) |
| The received count byte exceeds the maximum command size. More... | |
| #define | MTB_PMBUS_ERR_REQ_WR_FOR_RD_ONLY (0x200U) |
| The controller attempts to write data for the read only command. | |
| #define | MTB_PMBUS_ERR_ARB_LOST (0x400U) |
| The Middleware loses Arbitration. More... | |
| #define | MTB_PMBUS_ERR_INVALID_PAGE (0x800U) |
| The controller sets an unsupported page for the current target. More... | |
| #define | MTB_PMBUS_ERR_INVALID_PHASE (0x1000U) |
| The controller sets am unsupported phase for the current target. More... | |
| #define | MTB_PMBUS_ERR_APP_NACK_BYTE (0x2000U) |
| Command callback from the application sends NACK after receiving the byte. | |
| #define | MTB_PMBUS_ERR_WR_TO_PROT_CMD (0x4000U) |
| The error code indicating a write operation to a protected PMBus command. | |
| #define | MTB_PMBUS_ERR_BUS_ERROR (0x8000U) |
| An error is detected on the bus. More... | |
| #define | MTB_PMBUS_ERR_ADDR_WITH_RD_BIT (0x10000U) |
| The protocol is started with Target Address with Read Direction. More... | |
| #define | MTB_PMBUS_ERR_REQ_RD_FOR_PC_ONLY (0x20000U) |
| An error is detected when a read request occurs for a command specified as write and the process call. | |
| #define | MTB_PMBUS_ERR_REQ_WR_FOR_PC_ONLY (0x40000U) |
| An error is detected when a write request occurs for a command specified as read and the process call. | |
| #define | MTB_PMBUS_ERR_ZONE_VALUE_OUT_OF_RANGE (0x80000U) |
| The zone value assigned by the controller is out of range. | |
| #define | MTB_PMBUS_ERR_READ_REQ_FOR_FF (0x100000U) |
| Controller request read transfer for the paged/phased command when an active page/phase is set to 0xFF. | |
| #define MTB_PMBUS_ERR_BYTE_COUNT_TOO_BIG (0x100U) |
The received count byte exceeds the maximum command size.
Applicable only Block Protocols
| #define MTB_PMBUS_ERR_ARB_LOST (0x400U) |
The Middleware loses Arbitration.
This error is not reported in the following cases:
In these cases, the lost Arbitration is not an error.
| #define MTB_PMBUS_ERR_INVALID_PAGE (0x800U) |
The controller sets an unsupported page for the current target.
These errors can be triggered only if the PAGE command implemented is enabled in mtb_pmbus_stc_config_t::impl_cmd_mask.
| #define MTB_PMBUS_ERR_INVALID_PHASE (0x1000U) |
The controller sets am unsupported phase for the current target.
These errors can be triggered only if the implemented PHASE command is enabled in mtb_pmbus_stc_config_t::impl_cmd_mask.
| #define MTB_PMBUS_ERR_BUS_ERROR (0x8000U) |
An error is detected on the bus.
Typically, it is an unexpected Start or Stop condition.
| #define MTB_PMBUS_ERR_ADDR_WITH_RD_BIT (0x10000U) |
The protocol is started with Target Address with Read Direction.
The error is only applicable for PMBus mode.