MTB CAT5 Peripheral driver library
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cy_stc_pdm_pcm_inf_ctrl_sel_t Struct Reference

Description

PDM-PCM Interface structure.

Data Fields

BOOL8 pos_neg_sel
 latch data on positive or negative phase
 
uint8_t latch_phase
 Latch PDM data at certain phase of positive or negative edge clock. More...
 
BOOL8 clock_inv_sel
 1: no inv 0: inv the clk_root or ADC_clk
 

Field Documentation

uint8_t cy_stc_pdm_pcm_inf_ctrl_sel_t::latch_phase

Latch PDM data at certain phase of positive or negative edge clock.

Valid range 0 to 15