MTB CAT5 Peripheral driver library
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General Description

Data Structures

struct  BTSS_SYSTEM_NVRAM_OTA_HEADER_t
 Header fields for OTA upgrade feature. More...
 
struct  BTSS_SYSTEM_SLEEP_PARAMS_t
 Sleep configuration parameters. More...
 

Typedefs

typedef
BTSS_SYSTEM_PMU_SLEEP_MODE_t(* 
BTSS_SYSTEM_PRE_SLEEP_CB_t )(BTSS_SYSTEM_PMU_SLEEP_MODE_t sleep_mode, UINT32 sleep_time_in_lpo_cycles)
 Pre-Sleep Callback from PMU thread.
 
typedef void(* BTSS_SYSTEM_POST_SLEEP_CB_t )(BTSS_SYSTEM_PMU_SLEEP_MODE_t sleep_mode)
 Post-Sleep Callback from PMU thread.
 

Enumerations

enum  BTSS_SYSTEM_SLEEP_CONFIG_t {
  BTSS_SYSTEM_SLEEP_MODE_DISABLE,
  BTSS_SYSTEM_SLEEP_MODE_NO_TRANSPORT,
  BTSS_SYSTEM_SLEEP_MODE_WITH_TRANSPORT
}
 BTSS System - Sleep configurations. More...
 
enum  BTSS_SYSTEM_SLEEP_ACTIVE_CONFIG_t {
  BTSS_SYSTEM_SLEEP_WAKE_ACTIVE_LOW,
  BTSS_SYSTEM_SLEEP_WAKE_ACTIVE_HIGH
}
 BTSS System - Active level for Wake through GPIO. More...
 
enum  BTSS_SYSTEM_PMU_SLEEP_MODE_t {
  BTSS_SYSTEM_PMU_SLEEP_NOT_ALLOWED = 0,
  BTSS_SYSTEM_PMU_SLEEP_WITH_XTAL_ON = 1,
  BTSS_SYSTEM_PMU_SLEEP_WITH_XTAL_OFF = 2,
  BTSS_SYSTEM_PMU_SLEEP_RESERVED = 3,
  BTSS_SYSTEM_PMU_SLEEP_PDS = 4,
  BTSS_SYSTEM_PMU_SLEEP_EPDS = 5,
  BTSS_SYSTEM_PMU_SLEEP_MAX = BTSS_SYSTEM_PMU_SLEEP_EPDS
}
 BTSS System - Sleep modes. More...
 
enum  BTSS_SYSTEM_SLEEP_PMU_WAKE_SRC_t {
  BTSS_SYSTEM_PMU_WAKE_SRC_BT_UART_RTS_N = 1,
  BTSS_SYSTEM_PMU_WAKE_SRC_BT_UART_CTS_N = 3,
  BTSS_SYSTEM_PMU_WAKE_SRC_BT_UART_RXD = 5,
  BTSS_SYSTEM_PMU_WAKE_SRC_BT_GPIO_0 = 7,
  BTSS_SYSTEM_PMU_WAKE_SRC_BT_HOST_WAKE = 9,
  BTSS_SYSTEM_PMU_WAKE_SRC_BT_GPIO_2 = 11,
  BTSS_SYSTEM_PMU_WAKE_SRC_BT_GPIO_3 = 13,
  BTSS_SYSTEM_PMU_WAKE_SRC_BT_GPIO_4 = 15,
  BTSS_SYSTEM_PMU_WAKE_SRC_BT_GPIO_5 = 17,
  BTSS_SYSTEM_PMU_WAKE_SRC_BT_GPIO_6 = 19,
  BTSS_SYSTEM_PMU_WAKE_SRC_BT_GPIO_7 = 21,
  BTSS_SYSTEM_PMU_WAKE_SRC_BT_GPIO_19 = 23,
  BTSS_SYSTEM_PMU_WAKE_SRC_BT_GPIO_18 = 25,
  BTSS_SYSTEM_PMU_WAKE_SRC_BT_GPIO_16 = 27,
  BTSS_SYSTEM_PMU_WAKE_SRC_BT_GPIO_17 = 29,
  BTSS_SYSTEM_PMU_WAKE_SRC_BT_GPIO_8 = 32,
  BTSS_SYSTEM_PMU_WAKE_SRC_BT_GPIO_9 = 34,
  BTSS_SYSTEM_PMU_WAKE_SRC_BT_GPIO_10 = 36,
  BTSS_SYSTEM_PMU_WAKE_SRC_BT_GPIO_11 = 38,
  BTSS_SYSTEM_PMU_WAKE_SRC_TDM2_MCK = 70,
  BTSS_SYSTEM_PMU_WAKE_SRC_DMIC_DQ = 74,
  BTSS_SYSTEM_PMU_WAKE_SRC_DMIC_CK = 76,
  BTSS_SYSTEM_PMU_WAKE_SRC_TDM1_DO = 78,
  BTSS_SYSTEM_PMU_WAKE_SRC_TDM1_DI = 80,
  BTSS_SYSTEM_PMU_WAKE_SRC_TDM1_MCK = 82,
  BTSS_SYSTEM_PMU_WAKE_SRC_TDM1_SCK = 84,
  BTSS_SYSTEM_PMU_WAKE_SRC_TDM1_WS = 86,
  BTSS_SYSTEM_PMU_WAKE_SRC_TDM2_CLK = 88,
  BTSS_SYSTEM_PMU_WAKE_SRC_TDM2_SYNC = 90,
  BTSS_SYSTEM_PMU_WAKE_SRC_TDM2_IN = 92,
  BTSS_SYSTEM_PMU_WAKE_SRC_TDM2_OUT = 94,
  BTSS_SYSTEM_PMU_WAKE_SRC_LHL_GPIO_2 = 96,
  BTSS_SYSTEM_PMU_WAKE_SRC_LHL_GPIO_3 = 98,
  BTSS_SYSTEM_PMU_WAKE_SRC_LHL_GPIO_4 = 100,
  BTSS_SYSTEM_PMU_WAKE_SRC_LHL_GPIO_5 = 102,
  BTSS_SYSTEM_PMU_WAKE_SRC_LHL_GPIO_6 = 104,
  BTSS_SYSTEM_PMU_WAKE_SRC_LHL_GPIO_7 = 106,
  BTSS_SYSTEM_PMU_WAKE_SRC_LHL_GPIO_8 = 108,
  BTSS_SYSTEM_PMU_WAKE_SRC_LHL_GPIO_9 = 110
}
 BTSS System - wake sources.
 
enum  CTSS_SYSTEM_SLEEP_PMU_WAKE_SRC_t {
  CTSS_SYSTEM_PMU_WAKE_SRC_LHL_IO = 1024,
  CTSS_SYSTEM_PMU_WAKE_SRC_ADCCOMP_LPCOMP_1 = 1027,
  CTSS_SYSTEM_PMU_WAKE_SRC_ADCCOMP_LPCOMP_2 = 1028
}
 CTSS System - Wake sources.
 
enum  WLSS_SYSTEM_SLEEP_PMU_WAKE_SRC_t { WLSS_SYSTEM_PMU_WAKE_SRC_WLIO = 4096 }
 WLSS System - Wake sources.
 
enum  BTSS_SYSTEM_NVRAM_OTA_ERR_t {
  BTSS_SYSTEM_NVRAM_OTA_ERR_NONE = 0x00,
  BTSS_SYSTEM_NVRAM_OTA_ERR_ADDR_OUT_OF_RANGE = 0x01,
  BTSS_SYSTEM_NVRAM_OTA_ERR_CRYPTO_FAILED = 0x02,
  BTSS_SYSTEM_NVRAM_OTA_ERR_FLASH_WRITE_FAILED = 0x03,
  BTSS_SYSTEM_NVRAM_OTA_ERR_FLASH_ERASE_FAILED = 0x04,
  BTSS_SYSTEM_NVRAM_OTA_ERR_BUFFER_NOT_ALLOCATED = 0x05,
  BTSS_SYSTEM_NVRAM_OTA_ERR_CRYPTO_INVALID_KEY = 0x06,
  BTSS_SYSTEM_NVRAM_OTA_ERR_CERT_VALIDATION_FAILED = 0x07,
  BTSS_SYSTEM_NVRAM_OTA_ERR_NO_ACCESS = 0x08
}
 
enum  BTSS_SYSTEM_FLASH_POWER_DOWN_CMD_t {
  BTSS_SYSTEM_FLASH_POWER_DOWN_CMD_DISALLOW = 0,
  BTSS_SYSTEM_FLASH_POWER_DOWN_CMD_ALLOW_APP_CONTROL = 1,
  BTSS_SYSTEM_FLASH_POWER_DOWN_CMD_ALLOW_BT_CONTROL = 2
}
 Flash power down mode control methods.
 

Enumeration Type Documentation

BTSS System - Sleep configurations.

Enumerator
BTSS_SYSTEM_SLEEP_MODE_DISABLE 

Disable sleep mode.

BTSS_SYSTEM_SLEEP_MODE_NO_TRANSPORT 

To be used only when HCI UART transport is not connected to host.

BTSS_SYSTEM_SLEEP_MODE_WITH_TRANSPORT 

This mode allows sleep when HCI UART transport is connected to host and uses device wake line to wake up.

BTSS System - Active level for Wake through GPIO.

Enumerator
BTSS_SYSTEM_SLEEP_WAKE_ACTIVE_LOW 

Active low interrupt wakes the chip/host.

BTSS_SYSTEM_SLEEP_WAKE_ACTIVE_HIGH 

Active high interrupt wakes the chip/host.

BTSS System - Sleep modes.

Enumerator
BTSS_SYSTEM_PMU_SLEEP_NOT_ALLOWED 

sleep is not allowed

BTSS_SYSTEM_PMU_SLEEP_WITH_XTAL_ON 

sleep is not disabling any part of HW, just doing processor sleep

BTSS_SYSTEM_PMU_SLEEP_WITH_XTAL_OFF 

same as PMU_SLEEP_WITH_XTAL but XTAL is disabled

BTSS_SYSTEM_PMU_SLEEP_RESERVED 

Unused entry.

BTSS_SYSTEM_PMU_SLEEP_PDS 

PDS sleep is disabling part of HW during sleep but isolation is not enabled.

BTSS_SYSTEM_PMU_SLEEP_EPDS 

EPDS sleep is disabling most of HW during sleep, RAM is powered ON, after sleep system reboots at wake up.

BTSS_SYSTEM_PMU_SLEEP_MAX 

Max sleep mode.