Configuration structure.
Data Fields | |
cy_en_seglcd_wave_t | wave |
Waveform type configuration, see: cy_en_seglcd_wave_t. More... | |
cy_en_seglcd_drive_t | drive |
Driving mode configuration, see: cy_en_seglcd_drive_t. More... | |
cy_en_seglcd_bias_t | bias |
PWM bias selection, see: cy_en_seglcd_bias_t. More... | |
uint8_t | comNum |
The number of Common connections, the valid range is 2...16 however the maximum is dependent on PSOC device family - there could be limitation to 4 or 8 commons, see the device TRM. | |
uint8_t | frRate |
The LCD frame rate, the valid range is 30...150. | |
uint8_t | contrast |
The LCD contrast, the valid range is 0...100. | |
uint32_t | clkFreq |
The LCD clock frequency, the valid range is 10000...48000000 (Hz) | |
cy_en_seglcd_wave_t cy_stc_seglcd_config_t::wave |
Waveform type configuration, see: cy_en_seglcd_wave_t.
cy_en_seglcd_drive_t cy_stc_seglcd_config_t::drive |
Driving mode configuration, see: cy_en_seglcd_drive_t.
cy_en_seglcd_bias_t cy_stc_seglcd_config_t::bias |
PWM bias selection, see: cy_en_seglcd_bias_t.