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CAT2 Peripheral Driver Library
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CAT2 Peripheral Driver Library
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Macros | |
| #define | BC_EVT_NONE (0x00000000u) |
| No legacy charging events pending. More... | |
| #define | BC_EVT_ENTRY (0x00000001u) |
| Legacy charging state change pending. More... | |
| #define | BC_EVT_CMP1_FIRE (0x00000002u) |
| Charger detect comparator-1 interrupt raised. More... | |
| #define | BC_EVT_CMP2_FIRE (0x00000004u) |
| Charger detect comparator-2 interrupt raised. More... | |
| #define | BC_EVT_QC_CHANGE (0x00000008u) |
| Qualcomm charging state change. More... | |
| #define | BC_EVT_QC_CONT (0x00000010u) |
| QC charging continuous mode entry. More... | |
| #define | BC_EVT_AFC_RESET_RCVD (0x00000020u) |
| Adaptive Fast Charging Reset received. More... | |
| #define | BC_EVT_AFC_MSG_RCVD (0x00000040u) |
| Adaptive Fast Charging message received. More... | |
| #define | BC_EVT_AFC_MSG_SENT (0x00000080u) |
| Adaptive Fast Charging message sent. More... | |
| #define | BC_EVT_AFC_MSG_SEND_FAIL (0x00000100u) |
| Adaptive Fast Charging message sending failed. More... | |
| #define | BC_EVT_TIMEOUT1 (0x00000200u) |
| Charger detect state machine timeout #1. More... | |
| #define | BC_EVT_TIMEOUT2 (0x00000400u) |
| Charger detect state machine timeout #1. More... | |
| #define | BC_EVT_DISCONNECT (0x00000800u) |
| Disconnect detected by charger detect state machine. More... | |
| #define | BC_EVT_ALL_MASK (0xFFFFFFFFu) |
| Mask all charger detect states. More... | |
| #define | BCH_PORT_0_CMP1_INTR_MASK (0x1UL) |
| Interrupt mask for charger detect comparator #1 on port 0. More... | |
| #define | BCH_PORT_0_CMP2_INTR_MASK (0x2UL) |
| Interrupt mask for charger detect comparator #2 on port 0. More... | |
| #define | BCH_PORT_0_CMP1_2_INTR_MASK (BCH_PORT_0_CMP1_INTR_MASK | BCH_PORT_0_CMP2_INTR_MASK) |
| Interrupt mask for both charger detect comparators on port 0. More... | |
| #define | BCH_PORT_1_CMP1_INTR_MASK (0x4UL) |
| Interrupt mask for charger detect comparator #1 on port 1. More... | |
| #define | BCH_PORT_1_CMP2_INTR_MASK (0x8UL) |
| Interrupt mask for charger detect comparator #1 on port 1. More... | |
| #define | BCH_PORT_1_CMP1_2_INTR_MASK (0xcUL) |
| Interrupt mask for both charger detect comparators on port 1. More... | |
| #define | QC3_PORT_0_DP_PULSE_MASK (0x01UL) |
| Interrupt mask for QC 3.0 pulse on D+ pin of port 0. More... | |
| #define | QC3_PORT_0_DM_PULSE_MASK (0x10UL) |
| Interrupt mask for QC 3.0 pulse on D- pin of port 0. More... | |
| #define | QC3_PORT_0_DP_DM_PULSE_MASK (0x11UL) |
| Interrupt mask for QC 3.0 pulse on D+/D- pin of port 0. More... | |
| #define | QC3_PORT_1_DP_PULSE_MASK (0x02UL) |
| Interrupt mask for QC 3.0 pulse on D+ pin of port 1. More... | |
| #define | QC3_PORT_1_DM_PULSE_MASK (0x20UL) |
| Interrupt mask for QC 3.0 pulse on D- pin of port 1. More... | |
| #define | QC3_PORT_1_DP_DM_PULSE_MASK (0x22UL) |
| Interrupt mask for QC 3.0 pulse on D+/D- pin of port 1. More... | |
| #define | QC3_DP_DM_PULSE_FILTER_CLOCK_SEL (160UL) |
| QC 3.0 D+/D- pulse filter setting: 160us assuming 1MHz clock. More... | |
| #define | AFC_UI_CLK_CYCLE_COUNT (160UL) |
| AFC UI (160us) in terms of number of 1MHz clock cycles. More... | |
| #define | AFC_IDLE_OPCODE (0UL) |
| AFC state machine idle. More... | |
| #define | AFC_TX_PING_OPCODE (1UL) |
| AFC transmitter ping opcode. More... | |
| #define | AFC_RX_PING_OPCODE (2UL) |
| AFC receiver ping opcode. More... | |
| #define | AFC_TX_DATA_M_OPCODE (3UL) |
| AFC master data transmit opcode. More... | |
| #define | AFC_TX_DATA_S_OPCODE (4UL) |
| AFC slave data transmit opcode. More... | |
| #define | AFC_RX_DATA_OPCODE (5UL) |
| AFC receive data opcode. More... | |
| #define | AFC_SOURCE_OPCODE |
| AFC source opcode selection. More... | |
| #define | AFC_SINK_OPCODE |
| AFC sink opcode selection. More... | |
| #define | AFC_SINK_OPCODE_PING |
| AFC sink ping opcode selection. More... | |
| #define | AFC_MAX_BYTES (16u) |
| Maximum number of bytes in an AFC message. More... | |
| #define | AFC_BASE_VOLT (5000u) |
| Base voltage level during AFC negotiation. More... | |
| #define | AFC_VOLT_STEP (1000u) |
| AFC voltage unit increment. More... | |
| #define | AFC_BASE_AMP (75u) |
| Minimum AFC current level in 10 mA units. More... | |
| #define | AFC_AMP_STEP (15u) |
| AFC current level unit increment in 10 mA units. More... | |
| #define | AFC_MAX_AMP (0x0Fu) |
| Max current bit value for AFC VI message. | |
| #define | CDP_CHGDET_VREF_325mV (0u) |
| VRef selection: 325 mV. | |
| #define | CDP_CHGDET_VREF_600mV (1u) |
| VRef selection: 700 mV. | |
| #define | CDP_CHGDET_VREF_850mV (2u) |
| VRef selection: 850 mV. | |
| #define | CDP_CHGDET_COMP_INP_DM (0u) |
| Chg.Det. More... | |
| #define | CDP_CHGDET_COMP_INP_VREF (1u) |
| Chg.Det. More... | |
| #define | CDP_CHGDET_COMP_INP_DP (2u) |
| Chg.Det. More... | |
| #define | BC_SINK_1_2_MODE_ENABLE_MASK (0x01UL) |
| BC 1.2 sink mode enable mask for config table parameter. More... | |
| #define | BC_SINK_APPLE_MODE_ENABLE_MASK (0x02UL) |
| Apple sink mode enable mask for config table parameter. More... | |
| #define | BC_SINK_QC_MODE_ENABLE_MASK (0x04UL) |
| QC 2.0 sink mode enable mask for config table parameter. More... | |
| #define | BC_SINK_AFC_MODE_ENABLE_MASK (0x08UL) |
| AFC sink mode enable mask for config table parameter. More... | |
| #define | BC_SINK_ALL_MODES_DISABLED (0x00UL) |
| all legacy sink modes are disabled for config table parameter. More... | |
| #define | BC_SRC_1_2_MODE_ENABLE_MASK (0x01UL) |
| BC 1.2 Source mode enable mask for config table parameter. More... | |
| #define | BC_SRC_APPLE_MODE_ENABLE_MASK (0x02UL) |
| Apple source mode enable mask for config table parameter. More... | |
| #define | BC_SRC_QC_MODE_ENABLE_MASK (0x04UL) |
| QC source mode enable mask for config table parameter. More... | |
| #define | BC_SRC_AFC_MODE_ENABLE_MASK (0x08UL) |
| AFC source mode enable mask for config table parameter. More... | |
| #define | BC_SRC_QC_4_0_MODE_ENABLE_MASK (0x10UL) |
| QC 4.0 mode enable mask for config table parameter. More... | |
| #define | BC_SRC_QC_VER_2_CLASS_A_VAL (0UL) |
| QC source Version and class mask for config table parameter. More... | |
| #define | BC_SRC_QC_VER_2_CLASS_B_VAL (1UL) |
| QC source Version and class mask for config table parameter. More... | |
| #define | BC_SRC_QC_VER_3_CLASS_A_VAL (2UL) |
| QC source Version and class mask for config table parameter. More... | |
| #define | BC_SRC_QC_VER_3_CLASS_B_VAL (3UL) |
| QC source Version and class mask for config table parameter. More... | |
| #define | BC_CMP_0_IDX (0u) |
| Battery charger comparator #1. More... | |
| #define | BC_CMP_1_IDX (1u) |
| Battery charger comparator #2. More... | |
| #define | BC_PORT_0_IDX (0u) |
| BC PORT 0 INDEX. More... | |
| #define | BC_PORT_1_IDX (1u) |
| BC PORT 1 INDEX. More... | |
| #define | CY_FLIPPED_DP_DM (0u) |
| Flipped DP and DM Enable. More... | |
| #define | CY_TYPE_A_PORT_ENABLE (0u) |
| Enable TYPE-A support. More... | |
| #define | BC_AMP_LIMIT (300) |
| Maximum current across various BC modes: 3.0 A. More... | |
| #define | APPLE_AMP_1A (100) |
| Current limit for Apple 1.0A brick. More... | |
| #define | APPLE_AMP_2_1A (210) |
| Current limit for Apple 2.1A brick. More... | |
| #define | APPLE_AMP_2_4A (240) |
| Current limit for Apple 2.4A brick. More... | |
| #define | APPLE_AMP_3A (300) |
| Current limit for Apple 3.0A brick. More... | |
| #define | QC_AMP_5V (300) |
| Current limit for Quick Charge at 5 V. More... | |
| #define | QC_AMP_9V (300) |
| Current limit for Quick Charge at 9 V. More... | |
| #define | QC_AMP_12V (300) |
| Current limit for Quick Charge at 12 V. More... | |
| #define | QC_AMP_20V (300) |
| Current limit for Quick Charge at 20 V. More... | |
| #define | QC_AMP_CONT (300) |
| Current limit for Quick Charge continuous mode. More... | |
| #define | QC_CONT_VOLT_CHANGE_PER_PULSE (200u) |
| Quick Charge continuous mode voltage change per pulse received. More... | |
| #define | QC3_MIN_VOLT (3400u) |
| Minimum supply voltage used in QC charging. More... | |
| #define | PDSS_INTR4_AFC_PING_RECVD (1UL << 0UL) |
| AFC interrupt status bit. More... | |
| #define | PDSS_INTR4_AFC_SM_IDLE (1UL << 12UL) |
| AFC interrupt status bit. More... | |
| #define | PDSS_INTR4_AFC_TIMEOUT (1UL << 16UL) |
| AFC interrupt status bit. More... | |
| #define | PDSS_INTR4_AFC_RX_RESET (1UL << 20UL) |
| AFC interrupt status bit. More... | |
| #define | PDSS_INTR4_UPDATE_PING_PONG (1UL << 24UL) |
| AFC interrupt status bit. More... | |
| #define | PDSS_INTR4_AFC_ERROR (1UL << 28UL) |
| AFC interrupt status bit. More... | |
| #define | PDSS_CTRL_AFC_ENABLED (1UL << 25UL) |
| AFC enable bit value. More... | |
| #define | CDP_DX_VOLTAGE_CHECK_PERIOD (15u) |
| Frequency of D+/D- voltage checks in CDP state machine. More... | |
| #define | CDP_VDMSRC_FAULT_CHECK_PERIOD (2u) |
| Frequency of D- voltage checks once a fault has been detected. More... | |
| #define | MAX_CDP_VDMSRC_FAULT_COUNT (3u) |
| Max. More... | |
| #define BC_EVT_NONE (0x00000000u) |
No legacy charging events pending.
| #define BC_EVT_ENTRY (0x00000001u) |
Legacy charging state change pending.
| #define BC_EVT_CMP1_FIRE (0x00000002u) |
Charger detect comparator-1 interrupt raised.
| #define BC_EVT_CMP2_FIRE (0x00000004u) |
Charger detect comparator-2 interrupt raised.
| #define BC_EVT_QC_CHANGE (0x00000008u) |
Qualcomm charging state change.
| #define BC_EVT_QC_CONT (0x00000010u) |
QC charging continuous mode entry.
| #define BC_EVT_AFC_RESET_RCVD (0x00000020u) |
Adaptive Fast Charging Reset received.
| #define BC_EVT_AFC_MSG_RCVD (0x00000040u) |
Adaptive Fast Charging message received.
| #define BC_EVT_AFC_MSG_SENT (0x00000080u) |
Adaptive Fast Charging message sent.
| #define BC_EVT_AFC_MSG_SEND_FAIL (0x00000100u) |
Adaptive Fast Charging message sending failed.
| #define BC_EVT_TIMEOUT1 (0x00000200u) |
Charger detect state machine timeout #1.
| #define BC_EVT_TIMEOUT2 (0x00000400u) |
Charger detect state machine timeout #1.
| #define BC_EVT_DISCONNECT (0x00000800u) |
Disconnect detected by charger detect state machine.
| #define BC_EVT_ALL_MASK (0xFFFFFFFFu) |
Mask all charger detect states.
| #define BCH_PORT_0_CMP1_INTR_MASK (0x1UL) |
Interrupt mask for charger detect comparator #1 on port 0.
| #define BCH_PORT_0_CMP2_INTR_MASK (0x2UL) |
Interrupt mask for charger detect comparator #2 on port 0.
| #define BCH_PORT_0_CMP1_2_INTR_MASK (BCH_PORT_0_CMP1_INTR_MASK | BCH_PORT_0_CMP2_INTR_MASK) |
Interrupt mask for both charger detect comparators on port 0.
| #define BCH_PORT_1_CMP1_INTR_MASK (0x4UL) |
Interrupt mask for charger detect comparator #1 on port 1.
| #define BCH_PORT_1_CMP2_INTR_MASK (0x8UL) |
Interrupt mask for charger detect comparator #1 on port 1.
| #define BCH_PORT_1_CMP1_2_INTR_MASK (0xcUL) |
Interrupt mask for both charger detect comparators on port 1.
| #define QC3_PORT_0_DP_PULSE_MASK (0x01UL) |
Interrupt mask for QC 3.0 pulse on D+ pin of port 0.
| #define QC3_PORT_0_DM_PULSE_MASK (0x10UL) |
Interrupt mask for QC 3.0 pulse on D- pin of port 0.
| #define QC3_PORT_0_DP_DM_PULSE_MASK (0x11UL) |
Interrupt mask for QC 3.0 pulse on D+/D- pin of port 0.
| #define QC3_PORT_1_DP_PULSE_MASK (0x02UL) |
Interrupt mask for QC 3.0 pulse on D+ pin of port 1.
| #define QC3_PORT_1_DM_PULSE_MASK (0x20UL) |
Interrupt mask for QC 3.0 pulse on D- pin of port 1.
| #define QC3_PORT_1_DP_DM_PULSE_MASK (0x22UL) |
Interrupt mask for QC 3.0 pulse on D+/D- pin of port 1.
| #define QC3_DP_DM_PULSE_FILTER_CLOCK_SEL (160UL) |
QC 3.0 D+/D- pulse filter setting: 160us assuming 1MHz clock.
| #define AFC_UI_CLK_CYCLE_COUNT (160UL) |
AFC UI (160us) in terms of number of 1MHz clock cycles.
| #define AFC_IDLE_OPCODE (0UL) |
AFC state machine idle.
| #define AFC_TX_PING_OPCODE (1UL) |
AFC transmitter ping opcode.
| #define AFC_RX_PING_OPCODE (2UL) |
AFC receiver ping opcode.
| #define AFC_TX_DATA_M_OPCODE (3UL) |
AFC master data transmit opcode.
| #define AFC_TX_DATA_S_OPCODE (4UL) |
AFC slave data transmit opcode.
| #define AFC_RX_DATA_OPCODE (5UL) |
AFC receive data opcode.
| #define AFC_SOURCE_OPCODE |
AFC source opcode selection.
| #define AFC_SINK_OPCODE |
AFC sink opcode selection.
| #define AFC_SINK_OPCODE_PING |
AFC sink ping opcode selection.
| #define AFC_MAX_BYTES (16u) |
Maximum number of bytes in an AFC message.
| #define AFC_BASE_VOLT (5000u) |
Base voltage level during AFC negotiation.
| #define AFC_VOLT_STEP (1000u) |
AFC voltage unit increment.
| #define AFC_BASE_AMP (75u) |
Minimum AFC current level in 10 mA units.
| #define AFC_AMP_STEP (15u) |
AFC current level unit increment in 10 mA units.
| #define CDP_CHGDET_COMP_INP_DM (0u) |
Chg.Det.
comparator input selection: D-
| #define CDP_CHGDET_COMP_INP_VREF (1u) |
Chg.Det.
comparator input selection: VRef
| #define CDP_CHGDET_COMP_INP_DP (2u) |
Chg.Det.
comparator input selection: D+
| #define BC_SINK_1_2_MODE_ENABLE_MASK (0x01UL) |
BC 1.2 sink mode enable mask for config table parameter.
| #define BC_SINK_APPLE_MODE_ENABLE_MASK (0x02UL) |
Apple sink mode enable mask for config table parameter.
| #define BC_SINK_QC_MODE_ENABLE_MASK (0x04UL) |
QC 2.0 sink mode enable mask for config table parameter.
| #define BC_SINK_AFC_MODE_ENABLE_MASK (0x08UL) |
AFC sink mode enable mask for config table parameter.
| #define BC_SINK_ALL_MODES_DISABLED (0x00UL) |
all legacy sink modes are disabled for config table parameter.
| #define BC_SRC_1_2_MODE_ENABLE_MASK (0x01UL) |
BC 1.2 Source mode enable mask for config table parameter.
| #define BC_SRC_APPLE_MODE_ENABLE_MASK (0x02UL) |
Apple source mode enable mask for config table parameter.
| #define BC_SRC_QC_MODE_ENABLE_MASK (0x04UL) |
QC source mode enable mask for config table parameter.
| #define BC_SRC_AFC_MODE_ENABLE_MASK (0x08UL) |
AFC source mode enable mask for config table parameter.
| #define BC_SRC_QC_4_0_MODE_ENABLE_MASK (0x10UL) |
QC 4.0 mode enable mask for config table parameter.
| #define BC_SRC_QC_VER_2_CLASS_A_VAL (0UL) |
QC source Version and class mask for config table parameter.
| #define BC_SRC_QC_VER_2_CLASS_B_VAL (1UL) |
QC source Version and class mask for config table parameter.
| #define BC_SRC_QC_VER_3_CLASS_A_VAL (2UL) |
QC source Version and class mask for config table parameter.
| #define BC_SRC_QC_VER_3_CLASS_B_VAL (3UL) |
QC source Version and class mask for config table parameter.
| #define BC_CMP_0_IDX (0u) |
Battery charger comparator #1.
| #define BC_CMP_1_IDX (1u) |
Battery charger comparator #2.
| #define BC_PORT_0_IDX (0u) |
BC PORT 0 INDEX.
| #define BC_PORT_1_IDX (1u) |
BC PORT 1 INDEX.
| #define CY_FLIPPED_DP_DM (0u) |
Flipped DP and DM Enable.
| #define CY_TYPE_A_PORT_ENABLE (0u) |
Enable TYPE-A support.
| #define BC_AMP_LIMIT (300) |
Maximum current across various BC modes: 3.0 A.
| #define APPLE_AMP_1A (100) |
Current limit for Apple 1.0A brick.
| #define APPLE_AMP_2_1A (210) |
Current limit for Apple 2.1A brick.
| #define APPLE_AMP_2_4A (240) |
Current limit for Apple 2.4A brick.
| #define APPLE_AMP_3A (300) |
Current limit for Apple 3.0A brick.
| #define QC_AMP_5V (300) |
Current limit for Quick Charge at 5 V.
| #define QC_AMP_9V (300) |
Current limit for Quick Charge at 9 V.
| #define QC_AMP_12V (300) |
Current limit for Quick Charge at 12 V.
| #define QC_AMP_20V (300) |
Current limit for Quick Charge at 20 V.
| #define QC_AMP_CONT (300) |
Current limit for Quick Charge continuous mode.
| #define QC_CONT_VOLT_CHANGE_PER_PULSE (200u) |
Quick Charge continuous mode voltage change per pulse received.
| #define QC3_MIN_VOLT (3400u) |
Minimum supply voltage used in QC charging.
| #define PDSS_INTR4_AFC_PING_RECVD (1UL << 0UL) |
AFC interrupt status bit.
| #define PDSS_INTR4_AFC_SM_IDLE (1UL << 12UL) |
AFC interrupt status bit.
| #define PDSS_INTR4_AFC_TIMEOUT (1UL << 16UL) |
AFC interrupt status bit.
| #define PDSS_INTR4_AFC_RX_RESET (1UL << 20UL) |
AFC interrupt status bit.
| #define PDSS_INTR4_UPDATE_PING_PONG (1UL << 24UL) |
AFC interrupt status bit.
| #define PDSS_INTR4_AFC_ERROR (1UL << 28UL) |
AFC interrupt status bit.
| #define PDSS_CTRL_AFC_ENABLED (1UL << 25UL) |
AFC enable bit value.
| #define CDP_DX_VOLTAGE_CHECK_PERIOD (15u) |
Frequency of D+/D- voltage checks in CDP state machine.
| #define CDP_VDMSRC_FAULT_CHECK_PERIOD (2u) |
Frequency of D- voltage checks once a fault has been detected.
| #define MAX_CDP_VDMSRC_FAULT_COUNT (3u) |
Max.
number of faulty D- voltage readings allowed.