Macros | |
#define | HPD_IP_DIRECTION (0) |
HPD Input direction is used when sensing HPD output from a monitor. More... | |
#define | HPD_OP_DIRECTION (PDSS_CTRL_HPD_DIRECTION) |
HPD Output direction is used when driving HPD output to a DP source. More... | |
#define | HPD_EVENT_MASK (3u) |
HPD HW register event mask. More... | |
#define | HPD_EVENT_0_POS (0) |
HPD Event 0 bit position. More... | |
#define | HPD_EVENT_1_POS (2) |
HPD Event 1 bit position. More... | |
#define | HPD_EVENT_2_POS (4) |
HPD Event 2 bit position. More... | |
#define | HPD_EVENT_3_POS (6) |
HPD Event 3 bit position. More... | |
#define | HPD_GET_EVENT_0(hpd_queue) (((hpd_queue) >> HPD_EVENT_0_POS) & HPD_EVENT_MASK) |
Get the first HPD event from queue status. More... | |
#define | HPD_GET_EVENT_1(hpd_queue) (((hpd_queue) >> HPD_EVENT_1_POS) & HPD_EVENT_MASK) |
Get the second HPD event from queue status. More... | |
#define | HPD_GET_EVENT_2(hpd_queue) (((hpd_queue) >> HPD_EVENT_2_POS) & HPD_EVENT_MASK) |
Get the third HPD event from queue status. More... | |
#define | HPD_GET_EVENT_3(hpd_queue) (((hpd_queue) >> HPD_EVENT_3_POS) & HPD_EVENT_MASK) |
Get the fourth HPD event from queue status. More... | |
#define | PDSS_HPD_CTRL1_DEFAULT_VALUE (0x80530096UL) |
This is the default value to be used for HPD_CTRL1 register. More... | |
#define | PDSS_HPD_CTRL3_DEFAULT_VALUE (0x0005304BUL) |
This is the default value to be used for HPD_CTRL3 register. More... | |
#define | PDSS_HPDT_CTRL2_DEFAULT_VALUE (0x017BC530UL) |
This is the default value to be used for HPDT_CTRL2 register. More... | |
#define HPD_IP_DIRECTION (0) |
HPD Input direction is used when sensing HPD output from a monitor.
This is used in applications like video dongles and monitors.
#define HPD_OP_DIRECTION (PDSS_CTRL_HPD_DIRECTION) |
HPD Output direction is used when driving HPD output to a DP source.
This is used in applications like PD port controllers in PC/Mobile platforms.
#define HPD_EVENT_MASK (3u) |
HPD HW register event mask.
#define HPD_EVENT_0_POS (0) |
HPD Event 0 bit position.
#define HPD_EVENT_1_POS (2) |
HPD Event 1 bit position.
#define HPD_EVENT_2_POS (4) |
HPD Event 2 bit position.
#define HPD_EVENT_3_POS (6) |
HPD Event 3 bit position.
#define HPD_GET_EVENT_0 | ( | hpd_queue | ) | (((hpd_queue) >> HPD_EVENT_0_POS) & HPD_EVENT_MASK) |
Get the first HPD event from queue status.
#define HPD_GET_EVENT_1 | ( | hpd_queue | ) | (((hpd_queue) >> HPD_EVENT_1_POS) & HPD_EVENT_MASK) |
Get the second HPD event from queue status.
#define HPD_GET_EVENT_2 | ( | hpd_queue | ) | (((hpd_queue) >> HPD_EVENT_2_POS) & HPD_EVENT_MASK) |
Get the third HPD event from queue status.
#define HPD_GET_EVENT_3 | ( | hpd_queue | ) | (((hpd_queue) >> HPD_EVENT_3_POS) & HPD_EVENT_MASK) |
Get the fourth HPD event from queue status.
#define PDSS_HPD_CTRL1_DEFAULT_VALUE (0x80530096UL) |
This is the default value to be used for HPD_CTRL1 register.
This value translates to: 0x096: IRQ MIN time (0.25 ms) 0x500: IRQ MAX time (2.2 ms) 0: FLUSH_QUEUE 0: LOOPBACK_EN 1: RESET_HPD_STATE
#define PDSS_HPD_CTRL3_DEFAULT_VALUE (0x0005304BUL) |
This is the default value to be used for HPD_CTRL3 register.
This value translates to: STABLE_HIGH = 0x4B (2 ms) STABLE_LOW = 0x53 (2.213 ms)
#define PDSS_HPDT_CTRL2_DEFAULT_VALUE (0x017BC530UL) |
This is the default value to be used for HPDT_CTRL2 register.
This change is brought in to meet the timings mentioned in the display port specification. This value translates to: SET_LOW_DELAY = 0x530 (2.21 ms) SET_HIGH_DELAY = 0x7bc (3.3 ms) DEFAULT_OE = 1