Define RESET_CAUSE mask values. More...

Macros
#define	CY_SYSLIB_RESET_HWWDT SRSS_CONCAT(RES_CAUSE_RESET_WDT_Msk)
	A basic WatchDog Timer (WDT) reset has occurred since the last power cycle. More...

#define	CY_SYSLIB_PROT_FAULT SRSS_CONCAT(RES_CAUSE_RESET_PROT_FAULT_Msk)
	A protection violation occurred that requires a reset.

#define	CY_SYSLIB_RESET_SOFT SRSS_CONCAT(RES_CAUSE_RESET_SOFT_Msk)
	The CPU requested a system reset through it's SYSRESETREQ. More...

#define	CY_SYSLIB_RESET_ACT_FAULT SRSSHV_RES_CAUSE_RESET_ACT_FAULT_Msk
	Reset caused by the Fault Infrastructure. More...

#define	CY_SYSLIB_RESET_CRWDT SRSSHV_RES_CAUSE_RESET_CRWDT_Msk
	Challenge/Response Watchdog reset. More...

#define	CY_SYSLIB_RESET_XRES SRSSHV_RES_CAUSE_RESET_XRES_Msk
	External XRES pin was asserted. More...

#define	CY_SYSLIB_RESET_BODVDDD SRSSHV_RES_CAUSE_RESET_BODVDDD_Msk
	External VDDD supply crossed brown-out limit. More...

#define	CY_SYSLIB_RESET_BODVCCD SRSSHV_RES_CAUSE_RESET_BODVCCD_Msk
	Internal VCCD core supply crossed the brown-out limit. More...

#define	CY_SYSLIB_RESET_OVDVDDD SRSSHV_RES_CAUSE_RESET_OVDVDDD_Msk
	Overvoltage detection on the external VDDD supply. More...

#define	CY_SYSLIB_RESET_OVDVCCD SRSSHV_RES_CAUSE_RESET_OVDVCCD_Msk
	Overvoltage detection on the internal core VCCD supply. More...

#define	CY_SYSLIB_RESET_BODHVSS SRSSHV_RES_CAUSE_RESET_BODHVSS_Msk
	External VDDD supply crossed brown-out limit. More...

#define	CY_SYSLIB_RESET_PORVDDD SRSSHV_RES_CAUSE_RESET_PORVDDD_Msk
	Indicator that a POR occurred. More...

Detailed Description

Define RESET_CAUSE mask values.

Macro Definition Documentation

◆ CY_SYSLIB_RESET_HWWDT

#define CY_SYSLIB_RESET_HWWDT SRSS_CONCAT(RES_CAUSE_RESET_WDT_Msk)

A basic WatchDog Timer (WDT) reset has occurred since the last power cycle.

◆ CY_SYSLIB_RESET_SOFT

#define CY_SYSLIB_RESET_SOFT SRSS_CONCAT(RES_CAUSE_RESET_SOFT_Msk)

The CPU requested a system reset through it's SYSRESETREQ.

This can be done via a debugger probe or in firmware.

◆ CY_SYSLIB_RESET_ACT_FAULT

#define CY_SYSLIB_RESET_ACT_FAULT SRSSHV_RES_CAUSE_RESET_ACT_FAULT_Msk

Reset caused by the Fault Infrastructure.

Note: Only applicable for PSOC 4 HVMS/PA devices.

◆ CY_SYSLIB_RESET_CRWDT

#define CY_SYSLIB_RESET_CRWDT SRSSHV_RES_CAUSE_RESET_CRWDT_Msk

Challenge/Response Watchdog reset.

Note: Only applicable for PSOC 4 HVMS/PA devices.

◆ CY_SYSLIB_RESET_XRES

#define CY_SYSLIB_RESET_XRES SRSSHV_RES_CAUSE_RESET_XRES_Msk

External XRES pin was asserted.

Note: Only applicable for PSOC 4 HVMS/PA devices.

◆ CY_SYSLIB_RESET_BODVDDD

#define CY_SYSLIB_RESET_BODVDDD SRSSHV_RES_CAUSE_RESET_BODVDDD_Msk

External VDDD supply crossed brown-out limit.

Note: Only applicable for PSOC 4 HVMS/PA devices.

◆ CY_SYSLIB_RESET_BODVCCD

#define CY_SYSLIB_RESET_BODVCCD SRSSHV_RES_CAUSE_RESET_BODVCCD_Msk

Internal VCCD core supply crossed the brown-out limit.

Note: Only applicable for PSOC 4 HVMS/PA devices.

◆ CY_SYSLIB_RESET_OVDVDDD

#define CY_SYSLIB_RESET_OVDVDDD SRSSHV_RES_CAUSE_RESET_OVDVDDD_Msk

Overvoltage detection on the external VDDD supply.

Note: Only applicable for PSOC 4 HVMS/PA devices.

◆ CY_SYSLIB_RESET_OVDVCCD

#define CY_SYSLIB_RESET_OVDVCCD SRSSHV_RES_CAUSE_RESET_OVDVCCD_Msk

Overvoltage detection on the internal core VCCD supply.

Note: Only applicable for PSOC 4 HVMS/PA devices.

◆ CY_SYSLIB_RESET_BODHVSS

#define CY_SYSLIB_RESET_BODHVSS SRSSHV_RES_CAUSE_RESET_BODHVSS_Msk