General SmartIO functions. More...

Functions
__STATIC_INLINE uint8_t	Cy_SmartIO_GetChBypass (SMARTIO_PRT_Type *base)
	Gets the bypass/route state of all 8 channels in the Smart I/O. More...

cy_en_smartio_status_t	Cy_SmartIO_SetChBypass (SMARTIO_PRT_Type *base, uint8_t bypassMask)
	Sets the bypass/route state of all 8 channels in the Smart I/O. More...

__STATIC_INLINE cy_en_smartio_clksrc_t	Cy_SmartIO_GetClock (SMARTIO_PRT_Type *base)
	Gets the clock source of the Smart I/O. More...

cy_en_smartio_status_t	Cy_SmartIO_SetClock (SMARTIO_PRT_Type *base, cy_en_smartio_clksrc_t clkSrc)
	Sets the clock source of the Smart I/O. More...

__STATIC_INLINE uint8_t	Cy_SmartIO_GetIoSync (SMARTIO_PRT_Type *base)
	Gets the synchronization mode of the 8 I/O terminals. More...

cy_en_smartio_status_t	Cy_SmartIO_SetIoSync (SMARTIO_PRT_Type *base, uint8_t ioSyncEn)
	Sets the synchronization mode of the 8 I/O terminals. More...

__STATIC_INLINE uint8_t	Cy_SmartIO_GetChipSync (SMARTIO_PRT_Type *base)
	Gets the synchronization mode of the 8 chip-side terminals. More...

cy_en_smartio_status_t	Cy_SmartIO_SetChipSync (SMARTIO_PRT_Type *base, uint8_t chipSyncEn)
	Sets the synchronization mode of the 8 chip-side terminals. More...

cy_en_smartio_status_t	Cy_SmartIO_HoldOverride (SMARTIO_PRT_Type *base, bool hldOvr)
	Configures the hold override mode. More...

Detailed Description

General SmartIO functions.

Function Documentation

◆ Cy_SmartIO_GetChBypass()

__STATIC_INLINE uint8_t Cy_SmartIO_GetChBypass ( SMARTIO_PRT_Type * base )

Gets the bypass/route state of all 8 channels in the Smart I/O.

Bypass bit	Channel
0	io0<->chip0
1	io1<->chip1
2	io2<->chip2
3	io3<->chip3
4	io4<->chip4
5	io5<->chip5
6	io6<->chip6
7	io7<->chip7

Parameters

base	Pointer to the Smart I/O base address

Returns: Bypass/Route state of 8 io<->chip channels (bits [7:0]): 1=bypass, 0=routed.

Function Usage: /* Refer to the Cy_SmartIO_SetChBypass() function usage example */

◆ Cy_SmartIO_SetChBypass()

cy_en_smartio_status_t Cy_SmartIO_SetChBypass	(	SMARTIO_PRT_Type *	base,
		uint8_t	bypassMask
	)

Sets the bypass/route state of all 8 channels in the Smart I/O.

Bypass bit	Channel
0	io0<->chip0
1	io1<->chip1
2	io2<->chip2
3	io3<->chip3
4	io4<->chip4
5	io5<->chip5
6	io6<->chip6
7	io7<->chip7

Parameters

base	Pointer to the Smart I/O base address
bypassMask	Bypass/Route state of 8 io<->chip channels (bits [7:0]): 1=bypass, 0=routed.

Returns: Status of the operation

Note: The Smart I/O block must be disabled before calling this function.

Function Usage: /* Scenario: Smart I/O block 1 needs to bypass channels 2 and 3 */
uint8_t bypassMask;
bypassMask = Cy_SmartIO_GetChBypass(PRGIO_PORT_NUMBER);
Cy_SmartIO_Disable(PRGIO_PORT_NUMBER);
Cy_SmartIO_SetChBypass(PRGIO_PORT_NUMBER, (uint8_t)(bypassMask|CY_SMARTIO_CHANNEL2|CY_SMARTIO_CHANNEL3));
Cy_SmartIO_Enable(PRGIO_PORT_NUMBER);

◆ Cy_SmartIO_GetClock()

__STATIC_INLINE cy_en_smartio_clksrc_t Cy_SmartIO_GetClock ( SMARTIO_PRT_Type * base )

Gets the clock source of the Smart I/O.

Parameters

base	Pointer to the Smart I/O base address

Returns: Clock source

Function Usage: /* Refer to the Cy_SmartIO_SetClock() function usage example */

◆ Cy_SmartIO_SetClock()

cy_en_smartio_status_t Cy_SmartIO_SetClock	(	SMARTIO_PRT_Type *	base,
		cy_en_smartio_clksrc_t	clkSrc
	)

Sets the clock source of the Smart I/O.

Parameters

base	Pointer to the Smart I/O base address
clkSrc	Pointer to the Smart I/O base address

Returns: Status of the operation

Note: The Smart I/O block must be disabled before calling this function.

Function Usage: /* Scenario: Smart I/O block 1 needs to change the clock source to low-frequency clock */
cy_en_smartio_clksrc_t clkSrc;
clkSrc = Cy_SmartIO_GetClock(PRGIO_PORT_NUMBER);
if(clkSrc != CY_SMARTIO_CLK_LFCLK )
{
Cy_SmartIO_Disable(PRGIO_PORT_NUMBER);
Cy_SmartIO_SetClock(PRGIO_PORT_NUMBER, CY_SMARTIO_CLK_LFCLK);
Cy_SmartIO_Enable(PRGIO_PORT_NUMBER);
}

◆ Cy_SmartIO_GetIoSync()

__STATIC_INLINE uint8_t Cy_SmartIO_GetIoSync ( SMARTIO_PRT_Type * base )

Gets the synchronization mode of the 8 I/O terminals.

Sync bit	I/O terminal
0	io0
1	io1
2	io2
3	io3
4	io4
5	io5
6	io6
7	io7

Parameters

base	Pointer to the Smart I/O base address

Returns: Sync mode of 8 I/O terminals (bits [7:0]): 1=sync, 0=no sync.

Function Usage: /* Refer to the Cy_SmartIO_SetIoSync() function usage example */

◆ Cy_SmartIO_SetIoSync()

cy_en_smartio_status_t Cy_SmartIO_SetIoSync	(	SMARTIO_PRT_Type *	base,
		uint8_t	ioSyncEn
	)

Sets the synchronization mode of the 8 I/O terminals.

Sync bit	I/O terminal
0	io0
1	io1
2	io2
3	io3
4	io4
5	io5
6	io6
7	io7

Parameters

base	Pointer to the Smart I/O base address
ioSyncEn	Sync mode of 8 I/O terminals (bits [7:0]): 1=sync, 0=no sync.

Returns: Status of the operation

Note: The Smart I/O block must be disabled before calling this function.

Function Usage: /* Scenario: Smart I/O block 1 needs to change the synchronization option
on I/O 7 to synchronous mode */
uint8_t syncIo;
syncIo = Cy_SmartIO_GetClock(PRGIO_PORT_NUMBER);
Cy_SmartIO_Disable(PRGIO_PORT_NUMBER);
Cy_SmartIO_SetChBypass(PRGIO_PORT_NUMBER, (uint8_t)(syncIo|CY_SMARTIO_CHANNEL7));
Cy_SmartIO_Enable(PRGIO_PORT_NUMBER);

◆ Cy_SmartIO_GetChipSync()

__STATIC_INLINE uint8_t Cy_SmartIO_GetChipSync ( SMARTIO_PRT_Type * base )

Gets the synchronization mode of the 8 chip-side terminals.

Sync bit	chip terminal
0	chip0
1	chip1
2	chip2
3	chip3
4	chip4
5	chip5
6	chip6
7	chip7

Parameters

base	Pointer to the Smart I/O base address

Returns: Sync mode of 8 chip-side terminals (bits [7:0]): 1=sync, 0=no sync.

Function Usage: /* Refer to the Cy_SmartIO_SetChipSync() function usage example */

◆ Cy_SmartIO_SetChipSync()

cy_en_smartio_status_t Cy_SmartIO_SetChipSync	(	SMARTIO_PRT_Type *	base,
		uint8_t	chipSyncEn
	)

Sets the synchronization mode of the 8 chip-side terminals.

Sync bit	chip terminal
0	chip0
1	chip1
2	chip2
3	chip3
4	chip4
5	chip5
6	chip6
7	chip7

Parameters

base	Pointer to the Smart I/O base address
chipSyncEn	Sync mode of 8 chip-side terminals (bits [7:0]): 1=sync, 0=no sync.

Returns: Status of the operation

Note: The Smart I/O block must be disabled before calling this function.

Function Usage: /* Scenario: Smart I/O block 1 needs to change the synchronization option
on chip 7 to synchronous mode */
uint8_t syncChip;
syncChip = Cy_SmartIO_GetChipSync(PRGIO_PORT_NUMBER);
Cy_SmartIO_Disable(PRGIO_PORT_NUMBER);
Cy_SmartIO_SetChipSync(PRGIO_PORT_NUMBER, (uint8_t)(syncChip|CY_SMARTIO_CHANNEL7));
Cy_SmartIO_Enable(PRGIO_PORT_NUMBER);

◆ Cy_SmartIO_HoldOverride()

cy_en_smartio_status_t Cy_SmartIO_HoldOverride	(	SMARTIO_PRT_Type *	base,
		bool	hldOvr
	)

Configures the hold override mode.

In Deep-Sleep power mode, the HSIOM holds the GPIO output and output enable signals for all signals that operate in chip active domain. Enabling the hold override allows the Smart I/O to deliver Deep-Sleep output functionality on these GPIO terminals. If the Smart I/O should not drive any of the GPIO outputs, the hold override should be disabled.

Parameters

base	Pointer to the Smart I/O base address
hldOvr	true = Enabled: Smart I/O controls the port I/Os false = Disabled: HSIOM controls the port I/Os

Returns: Status of the operation

Note: The Smart I/O block must be disabled before calling this function.

Function Usage: /* Scenario: Smart I/O block 1 needs to enable the hold-override so that
it is operational during deep-sleep */
Cy_SmartIO_Disable(PRGIO_PORT_NUMBER);
Cy_SmartIO_HoldOverride(PRGIO_PORT_NUMBER, true);
Cy_SmartIO_Enable(PRGIO_PORT_NUMBER);

Functions

Detailed Description

Function Documentation

◆ Cy_SmartIO_GetChBypass()

◆ Cy_SmartIO_SetChBypass()

◆ Cy_SmartIO_GetClock()

◆ Cy_SmartIO_SetClock()

◆ Cy_SmartIO_GetIoSync()

◆ Cy_SmartIO_SetIoSync()

◆ Cy_SmartIO_GetChipSync()

◆ Cy_SmartIO_SetChipSync()

◆ Cy_SmartIO_HoldOverride()