CAT2 Peripheral Driver Library
Registers Constants

Macros

#define CY_MSC_REG_OFFSET_CTL   (offsetof(MSC_Type, CTL))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SPARE   (offsetof(MSC_Type, SPARE))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SCAN_CTL1   (offsetof(MSC_Type, SCAN_CTL1))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SCAN_CTL2   (offsetof(MSC_Type, SCAN_CTL2))
 The register offset.
 
#define CY_MSC_REG_OFFSET_INIT_CTL1   (offsetof(MSC_Type, INIT_CTL1))
 The register offset.
 
#define CY_MSC_REG_OFFSET_INIT_CTL2   (offsetof(MSC_Type, INIT_CTL2))
 The register offset.
 
#define CY_MSC_REG_OFFSET_INIT_CTL3   (offsetof(MSC_Type, INIT_CTL3))
 The register offset.
 
#define CY_MSC_REG_OFFSET_INIT_CTL4   (offsetof(MSC_Type, INIT_CTL4))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SENSE_DUTY_CTL   (offsetof(MSC_Type, SENSE_DUTY_CTL))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SENSE_PERIOD_CTL   (offsetof(MSC_Type, SENSE_PERIOD_CTL))
 The register offset.
 
#define CY_MSC_REG_OFFSET_FILTER_CTL   (offsetof(MSC_Type, FILTER_CTL))
 The register offset.
 
#define CY_MSC_REG_OFFSET_CCOMP_CDAC_CTL   (offsetof(MSC_Type, CCOMP_CDAC_CTL))
 The register offset.
 
#define CY_MSC_REG_OFFSET_DITHER_CDAC_CTL   (offsetof(MSC_Type, DITHER_CDAC_CTL))
 The register offset.
 
#define CY_MSC_REG_OFFSET_CSW_CTL   (offsetof(MSC_Type, CSW_CTL))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SW_SEL_GPIO   (offsetof(MSC_Type, SW_SEL_GPIO))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SW_SEL_CDAC_RE   (offsetof(MSC_Type, SW_SEL_CDAC_RE))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SW_SEL_CDAC_CO   (offsetof(MSC_Type, SW_SEL_CDAC_CO))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SW_SEL_CDAC_CF   (offsetof(MSC_Type, SW_SEL_CDAC_CF))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SW_SEL_CMOD1   (offsetof(MSC_Type, SW_SEL_CMOD1))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SW_SEL_CMOD2   (offsetof(MSC_Type, SW_SEL_CMOD2))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SW_SEL_CMOD3   (offsetof(MSC_Type, SW_SEL_CMOD3))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SW_SEL_CMOD4   (offsetof(MSC_Type, SW_SEL_CMOD4))
 The register offset.
 
#define CY_MSC_REG_OFFSET_OBS_CTL   (offsetof(MSC_Type, OBS_CTL))
 The register offset.
 
#define CY_MSC_REG_OFFSET_WAKEUP_CTL   (offsetof(MSC_Type, WAKEUP_CTL))
 The register offset.
 
#define CY_MSC_REG_OFFSET_LP_AOC_CTL   (offsetof(MSC_Type, LP_AOC_CTL))
 The register offset.
 
#define CY_MSC_REG_OFFSET_STATUS1   (offsetof(MSC_Type, STATUS1))
 The register offset.
 
#define CY_MSC_REG_OFFSET_STATUS2   (offsetof(MSC_Type, STATUS2))
 The register offset.
 
#define CY_MSC_REG_OFFSET_STATUS3   (offsetof(MSC_Type, STATUS3))
 The register offset.
 
#define CY_MSC_REG_OFFSET_RESULT_FIFO_STATUS   (offsetof(MSC_Type, RESULT_FIFO_STATUS))
 The register offset.
 
#define CY_MSC_REG_OFFSET_RESULT_FIFO_RD   (offsetof(MSC_Type, RESULT_FIFO_RD))
 The register offset.
 
#define CY_MSC_REG_OFFSET_INTR   (offsetof(MSC_Type, INTR))
 The register offset.
 
#define CY_MSC_REG_OFFSET_INTR_SET   (offsetof(MSC_Type, INTR_SET))
 The register offset.
 
#define CY_MSC_REG_OFFSET_INTR_MASK   (offsetof(MSC_Type, INTR_MASK))
 The register offset.
 
#define CY_MSC_REG_OFFSET_INTR_MASKED   (offsetof(MSC_Type, INTR_MASKED))
 The register offset.
 
#define CY_MSC_REG_OFFSET_INTR_LP   (offsetof(MSC_Type, INTR_LP))
 The register offset.
 
#define CY_MSC_REG_OFFSET_INTR_LP_SET   (offsetof(MSC_Type, INTR_LP_SET))
 The register offset.
 
#define CY_MSC_REG_OFFSET_INTR_LP_MASK   (offsetof(MSC_Type, INTR_LP_MASK))
 The register offset.
 
#define CY_MSC_REG_OFFSET_INTR_LP_MASKED   (offsetof(MSC_Type, INTR_LP_MASKED))
 The register offset.
 
#define CY_MSC_REG_OFFSET_FRAME_CMD   (offsetof(MSC_Type, FRAME_CMD))
 The register offset.
 
#define CY_MSC_REG_OFFSET_WAKEUP_CMD   (offsetof(MSC_Type, WAKEUP_CMD))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SNS_STRUCT_CTL   (offsetof(MSC_Type, SNS_STRUCT_CTL))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SNS_LP_AOC_SENSOR_CTL1   (offsetof(MSC_Type, SNS_LP_AOC_SENSOR_CTL1))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SNS_LP_AOC_SENSOR_CTL2   (offsetof(MSC_Type, SNS_LP_AOC_SENSOR_CTL2))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SNS_SW_SEL_CSW_MASK2   (offsetof(MSC_Type, SNS_SW_SEL_CSW_MASK2))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SNS_SW_SEL_CSW_MASK1   (offsetof(MSC_Type, SNS_SW_SEL_CSW_MASK1))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SNS_SW_SEL_CSW_MASK0   (offsetof(MSC_Type, SNS_SW_SEL_CSW_MASK0))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SNS_SCAN_CTL   (offsetof(MSC_Type, SNS_SCAN_CTL))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SNS_CDAC_CTL   (offsetof(MSC_Type, SNS_CDAC_CTL))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SNS_CTL   (offsetof(MSC_Type, SNS_CTL))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SW_SEL_CSW0   (offsetof(MSC_Type, SW_SEL_CSW[0]))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SW_SEL_CSW1   (offsetof(MSC_Type, SW_SEL_CSW[1]))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SW_SEL_CSW2   (offsetof(MSC_Type, SW_SEL_CSW[2]))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SW_SEL_CSW3   (offsetof(MSC_Type, SW_SEL_CSW[3]))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SW_SEL_CSW4   (offsetof(MSC_Type, SW_SEL_CSW[4]))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SW_SEL_CSW5   (offsetof(MSC_Type, SW_SEL_CSW[5]))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SW_SEL_CSW6   (offsetof(MSC_Type, SW_SEL_CSW[6]))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SW_SEL_CSW7   (offsetof(MSC_Type, SW_SEL_CSW[7]))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SW_SEL_CSW8   (offsetof(MSC_Type, SW_SEL_CSW[8]))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SW_SEL_CSW9   (offsetof(MSC_Type, SW_SEL_CSW[9]))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SW_SEL_CSW10   (offsetof(MSC_Type, SW_SEL_CSW[10]))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SW_SEL_CSW11   (offsetof(MSC_Type, SW_SEL_CSW[11]))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SW_SEL_CSW12   (offsetof(MSC_Type, SW_SEL_CSW[12]))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SW_SEL_CSW13   (offsetof(MSC_Type, SW_SEL_CSW[13]))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SW_SEL_CSW14   (offsetof(MSC_Type, SW_SEL_CSW[14]))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SW_SEL_CSW15   (offsetof(MSC_Type, SW_SEL_CSW[15]))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SW_SEL_CSW16   (offsetof(MSC_Type, SW_SEL_CSW[16]))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SW_SEL_CSW17   (offsetof(MSC_Type, SW_SEL_CSW[17]))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SW_SEL_CSW18   (offsetof(MSC_Type, SW_SEL_CSW[18]))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SW_SEL_CSW19   (offsetof(MSC_Type, SW_SEL_CSW[19]))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SW_SEL_CSW20   (offsetof(MSC_Type, SW_SEL_CSW[20]))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SW_SEL_CSW21   (offsetof(MSC_Type, SW_SEL_CSW[21]))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SW_SEL_CSW22   (offsetof(MSC_Type, SW_SEL_CSW[22]))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SW_SEL_CSW23   (offsetof(MSC_Type, SW_SEL_CSW[23]))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SW_SEL_CSW24   (offsetof(MSC_Type, SW_SEL_CSW[24]))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SW_SEL_CSW25   (offsetof(MSC_Type, SW_SEL_CSW[25]))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SW_SEL_CSW26   (offsetof(MSC_Type, SW_SEL_CSW[26]))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SW_SEL_CSW27   (offsetof(MSC_Type, SW_SEL_CSW[27]))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SW_SEL_CSW28   (offsetof(MSC_Type, SW_SEL_CSW[28]))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SW_SEL_CSW29   (offsetof(MSC_Type, SW_SEL_CSW[29]))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SW_SEL_CSW30   (offsetof(MSC_Type, SW_SEL_CSW[30]))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SW_SEL_CSW31   (offsetof(MSC_Type, SW_SEL_CSW[31]))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SW_SEL_CSW_FUNC0   (offsetof(MSC_Type, SW_SEL_CSW_FUNC[0]))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SW_SEL_CSW_FUNC1   (offsetof(MSC_Type, SW_SEL_CSW_FUNC[1]))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SW_SEL_CSW_FUNC2   (offsetof(MSC_Type, SW_SEL_CSW_FUNC[2]))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SW_SEL_CSW_FUNC3   (offsetof(MSC_Type, SW_SEL_CSW_FUNC[3]))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SW_SEL_CSW_FUNC4   (offsetof(MSC_Type, SW_SEL_CSW_FUNC[4]))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SW_SEL_CSW_FUNC5   (offsetof(MSC_Type, SW_SEL_CSW_FUNC[5]))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SW_SEL_CSW_FUNC6   (offsetof(MSC_Type, SW_SEL_CSW_FUNC[6]))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SW_SEL_CSW_FUNC7   (offsetof(MSC_Type, SW_SEL_CSW_FUNC[7]))
 The register offset.
 
#define CY_MSC_REG_OFFSET_MODE0_SENSE_DUTY_CTL   (offsetof(MSC_Type, MODE[0].SENSE_DUTY_CTL))
 The register offset.
 
#define CY_MSC_REG_OFFSET_MODE0_SW_SEL_CDAC_FL   (offsetof(MSC_Type, MODE[0].SW_SEL_CDAC_FL))
 The register offset.
 
#define CY_MSC_REG_OFFSET_MODE0_SW_SEL_TOP   (offsetof(MSC_Type, MODE[0].SW_SEL_TOP))
 The register offset.
 
#define CY_MSC_REG_OFFSET_MODE0_SW_SEL_COMP   (offsetof(MSC_Type, MODE[0].SW_SEL_COMP))
 The register offset.
 
#define CY_MSC_REG_OFFSET_MODE0_SW_SEL_SH   (offsetof(MSC_Type, MODE[0].SW_SEL_SH))
 The register offset.
 
#define CY_MSC_REG_OFFSET_MODE1_SENSE_DUTY_CTL   (offsetof(MSC_Type, MODE[1].SENSE_DUTY_CTL))
 The register offset.
 
#define CY_MSC_REG_OFFSET_MODE1_SW_SEL_CDAC_FL   (offsetof(MSC_Type, MODE[1].SW_SEL_CDAC_FL))
 The register offset.
 
#define CY_MSC_REG_OFFSET_MODE1_SW_SEL_TOP   (offsetof(MSC_Type, MODE[1].SW_SEL_TOP))
 The register offset.
 
#define CY_MSC_REG_OFFSET_MODE1_SW_SEL_COMP   (offsetof(MSC_Type, MODE[1].SW_SEL_COMP))
 The register offset.
 
#define CY_MSC_REG_OFFSET_MODE1_SW_SEL_SH   (offsetof(MSC_Type, MODE[1].SW_SEL_SH))
 The register offset.
 
#define CY_MSC_REG_OFFSET_MODE2_SENSE_DUTY_CTL   (offsetof(MSC_Type, MODE[2].SENSE_DUTY_CTL))
 The register offset.
 
#define CY_MSC_REG_OFFSET_MODE2_SW_SEL_CDAC_FL   (offsetof(MSC_Type, MODE[2].SW_SEL_CDAC_FL))
 The register offset.
 
#define CY_MSC_REG_OFFSET_MODE2_SW_SEL_TOP   (offsetof(MSC_Type, MODE[2].SW_SEL_TOP))
 The register offset.
 
#define CY_MSC_REG_OFFSET_MODE2_SW_SEL_COMP   (offsetof(MSC_Type, MODE[2].SW_SEL_COMP))
 The register offset.
 
#define CY_MSC_REG_OFFSET_MODE2_SW_SEL_SH   (offsetof(MSC_Type, MODE[2].SW_SEL_SH))
 The register offset.
 
#define CY_MSC_REG_OFFSET_MODE3_SENSE_DUTY_CTL   (offsetof(MSC_Type, MODE[3].SENSE_DUTY_CTL))
 The register offset.
 
#define CY_MSC_REG_OFFSET_MODE3_SW_SEL_CDAC_FL   (offsetof(MSC_Type, MODE[3].SW_SEL_CDAC_FL))
 The register offset.
 
#define CY_MSC_REG_OFFSET_MODE3_SW_SEL_TOP   (offsetof(MSC_Type, MODE[3].SW_SEL_TOP))
 The register offset.
 
#define CY_MSC_REG_OFFSET_MODE3_SW_SEL_COMP   (offsetof(MSC_Type, MODE[3].SW_SEL_COMP))
 The register offset.
 
#define CY_MSC_REG_OFFSET_MODE3_SW_SEL_SH   (offsetof(MSC_Type, MODE[3].SW_SEL_SH))
 The register offset.
 
#define CY_MSC_REG_OFFSET_TRIM_CTL   (offsetof(MSC_Type, TRIM_CTL))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SW_SEL_CSW(index)   (offsetof(MSC_Type, SW_SEL_CSW[(index)]))
 The register offset.
 
#define CY_MSC_REG_OFFSET_SW_SEL_CSW_FUNC(index)   (offsetof(MSC_Type, SW_SEL_CSW_FUNC[(index)]))
 The register offset.
 
#define CY_MSC_REG_OFFSET_MODE_SENSE_DUTY_CTL(index)   (offsetof(MSC_Type, MODE[(index)].SENSE_DUTY_CTL))
 The register offset.
 
#define CY_MSC_REG_OFFSET_MODE_SW_SEL_CDAC_FL(index)   (offsetof(MSC_Type, MODE[(index)].SW_SEL_CDAC_FL))
 The register offset.
 
#define CY_MSC_REG_OFFSET_MODE_SW_SEL_TOP(index)   (offsetof(MSC_Type, MODE[(index)].SW_SEL_TOP))
 The register offset.
 
#define CY_MSC_REG_OFFSET_MODE_SW_SEL_COMP(index)   (offsetof(MSC_Type, MODE[(index)].SW_SEL_COMP))
 The register offset.
 
#define CY_MSC_REG_OFFSET_MODE_SW_SEL_SH(index)   (offsetof(MSC_Type, MODE[(index)].SW_SEL_SH))
 The register offset.
 

Detailed Description