Macros | |
#define | CY_USBFS_DEV_DRV_LPM_INTR USBFS_USBLPM_INTR_CAUSE_HI_LPM_INTR_Msk |
Link Power Management request interrupt. | |
#define | CY_USBFS_DEV_DRV_ARBITER_INTR USBFS_USBLPM_INTR_CAUSE_HI_ARB_EP_INTR_Msk |
Arbiter interrupt. | |
#define | CY_USBFS_DEV_DRV_EP0_INTR USBFS_USBLPM_INTR_CAUSE_HI_EP0_INTR_Msk |
Endpoint 0 interrupt. | |
#define | CY_USBFS_DEV_DRV_SOF_INTR USBFS_USBLPM_INTR_CAUSE_HI_SOF_INTR_Msk |
SOF interrupt. | |
#define | CY_USBFS_DEV_DRV_BUS_RESET_INTR USBFS_USBLPM_INTR_CAUSE_HI_BUS_RESET_INTR_Msk |
Bus Reset interrupt. | |
#define | CY_USBFS_DEV_DRV_EP1_INTR USBFS_USBLPM_INTR_CAUSE_HI_EP1_INTR_Msk |
Data endpoint 1 interrupt. | |
#define | CY_USBFS_DEV_DRV_EP2_INTR USBFS_USBLPM_INTR_CAUSE_HI_EP2_INTR_Msk |
Data endpoint 2 interrupt. | |
#define | CY_USBFS_DEV_DRV_EP3_INTR USBFS_USBLPM_INTR_CAUSE_HI_EP3_INTR_Msk |
Data endpoint 3 interrupt. | |
#define | CY_USBFS_DEV_DRV_EP4_INTR USBFS_USBLPM_INTR_CAUSE_HI_EP4_INTR_Msk |
Data endpoint 4 interrupt. | |
#define | CY_USBFS_DEV_DRV_EP5_INTR USBFS_USBLPM_INTR_CAUSE_HI_EP5_INTR_Msk |
Data endpoint 5 interrupt. | |
#define | CY_USBFS_DEV_DRV_EP6_INTR USBFS_USBLPM_INTR_CAUSE_HI_EP6_INTR_Msk |
Data endpoint 6 interrupt. | |
#define | CY_USBFS_DEV_DRV_EP7_INTR USBFS_USBLPM_INTR_CAUSE_HI_EP7_INTR_Msk |
Data endpoint 7 interrupt. | |
#define | CY_USBFS_DEV_DRV_EP8_INTR USBFS_USBLPM_INTR_CAUSE_HI_EP8_INTR_Msk |
Data endpoint 8 interrupt. | |