General Description

Macros
#define	CY_TDM_INTR_TX_FIFO_TRIGGER (TDM_TDM_STRUCT_TDM_TX_STRUCT_INTR_TX_FIFO_TRIGGER_Msk)
	Bit 0: Less entries in the TX FIFO than specified by Trigger Level. More...

#define	CY_TDM_INTR_TX_FIFO_OVERFLOW (TDM_TDM_STRUCT_TDM_TX_STRUCT_INTR_TX_FIFO_OVERFLOW_Msk)
	Bit 1: Attempt to write to a full TX FIFO. More...

#define	CY_TDM_INTR_TX_FIFO_UNDERFLOW (TDM_TDM_STRUCT_TDM_TX_STRUCT_INTR_TX_FIFO_UNDERFLOW_Msk)
	Bit 2: Attempt to read from an empty TX FIFO. More...

#define	CY_TDM_INTR_TX_IF_UNDERFLOW (TDM_TDM_STRUCT_TDM_TX_STRUCT_INTR_TX_IF_UNDERFLOW_Msk)
	Bit 8: Interface frequency is higher than PCM sample frequency. More...

#define	CY_TDM_INTR_RX_FIFO_TRIGGER (TDM_TDM_STRUCT_TDM_RX_STRUCT_INTR_RX_FIFO_TRIGGER_Msk)
	Bit 0: Less entries in the RX FIFO than specified by Trigger Level. More...

#define	CY_TDM_INTR_RX_FIFO_OVERFLOW (TDM_TDM_STRUCT_TDM_RX_STRUCT_INTR_RX_FIFO_OVERFLOW_Msk)
	Bit 1: Attempt to write to a full RX FIFO. More...

#define	CY_TDM_INTR_RX_FIFO_UNDERFLOW (TDM_TDM_STRUCT_TDM_RX_STRUCT_INTR_RX_FIFO_UNDERFLOW_Msk)
	Bit 2: Attempt to read from an empty RX FIFO. More...

#define	CY_TDM_INTR_RX_IF_UNDERFLOW (TDM_TDM_STRUCT_TDM_RX_STRUCT_INTR_RX_IF_OVERFLOW_Msk)
	Bit 8: Interface frequency is higher than PCM sample frequency. More...

Macro Definition Documentation

#define CY_TDM_INTR_TX_FIFO_TRIGGER (TDM_TDM_STRUCT_TDM_TX_STRUCT_INTR_TX_FIFO_TRIGGER_Msk)

Bit 0: Less entries in the TX FIFO than specified by Trigger Level.

#define CY_TDM_INTR_TX_FIFO_OVERFLOW (TDM_TDM_STRUCT_TDM_TX_STRUCT_INTR_TX_FIFO_OVERFLOW_Msk)

Bit 1: Attempt to write to a full TX FIFO.

#define CY_TDM_INTR_TX_FIFO_UNDERFLOW (TDM_TDM_STRUCT_TDM_TX_STRUCT_INTR_TX_FIFO_UNDERFLOW_Msk)

Bit 2: Attempt to read from an empty TX FIFO.

#define CY_TDM_INTR_TX_IF_UNDERFLOW (TDM_TDM_STRUCT_TDM_TX_STRUCT_INTR_TX_IF_UNDERFLOW_Msk)

Bit 8: Interface frequency is higher than PCM sample frequency.

#define CY_TDM_INTR_RX_FIFO_TRIGGER (TDM_TDM_STRUCT_TDM_RX_STRUCT_INTR_RX_FIFO_TRIGGER_Msk)

Bit 0: Less entries in the RX FIFO than specified by Trigger Level.

#define CY_TDM_INTR_RX_FIFO_OVERFLOW (TDM_TDM_STRUCT_TDM_RX_STRUCT_INTR_RX_FIFO_OVERFLOW_Msk)

Bit 1: Attempt to write to a full RX FIFO.

#define CY_TDM_INTR_RX_FIFO_UNDERFLOW (TDM_TDM_STRUCT_TDM_RX_STRUCT_INTR_RX_FIFO_UNDERFLOW_Msk)

Bit 2: Attempt to read from an empty RX FIFO.

#define CY_TDM_INTR_RX_IF_UNDERFLOW (TDM_TDM_STRUCT_TDM_RX_STRUCT_INTR_RX_IF_OVERFLOW_Msk)

Bit 8: Interface frequency is higher than PCM sample frequency.