Defines for the CPU and system power modes status.
Macros | |
#define | CY_SYSPM_STATUS_CM4_ACTIVE (0x1U) |
The CM4 is in CPU Active mode. | |
#define | CY_SYSPM_STATUS_CM4_SLEEP (0x2U) |
The CM4 is in CPU Sleep mode. | |
#define | CY_SYSPM_STATUS_CM4_DEEPSLEEP (0x4U) |
The CM4 is in CPU Deep Sleep mode. | |
#define | CY_SYSPM_STATUS_CM0_ACTIVE ((uint32_t) 0x1U << 4U) |
The CM0p is CPU Active mode. | |
#define | CY_SYSPM_STATUS_CM0_SLEEP ((uint32_t) 0x2U << 4U) |
The CM0p is in CPU Sleep mode. | |
#define | CY_SYSPM_STATUS_CM0_DEEPSLEEP ((uint32_t) 0x4U << 4U) |
The CM0p is in CPU Deep Sleep mode. | |
#define | CY_SYSPM_STATUS_CM0_LOWPOWER ((uint32_t) 0x88U << 8U) |
The CM0 is in low power mode, This MACRO is deprecated and will be removed in future release. More... | |
#define | CY_SYSPM_STATUS_CM7_0_ACTIVE ((uint32_t) ((uint32_t)0x1U << 8U)) |
The CM7_0 is Active. | |
#define | CY_SYSPM_STATUS_CM7_0_SLEEP ((uint32_t) ((uint32_t)0x2U << 8U)) |
The CM7_0 is in Sleep. | |
#define | CY_SYSPM_STATUS_CM7_0_DEEPSLEEP ((uint32_t) ((uint32_t)0x4U << 8U)) |
The CM7_0 is in DeepSleep. | |
#define | CY_SYSPM_STATUS_CM7_0_LOWPOWER ((uint32_t) ((uint32_t)0x80U << 16U)) |
The CM7_0 is Low Power mode. More... | |
#define | CY_SYSPM_CM7_0_PWR_CTL_PWR_MODE_RETAINED (2U) |
The define of retained power mode of the CM7_0. More... | |
#define | CY_SYSPM_STATUS_CM7_1_ACTIVE ((uint32_t) ((uint32_t)0x1U << 12U)) |
The CM7_1 is Active. | |
#define | CY_SYSPM_STATUS_CM7_1_SLEEP ((uint32_t) ((uint32_t)0x2U << 12U)) |
The CM7_1 is in Sleep. | |
#define | CY_SYSPM_STATUS_CM7_1_DEEPSLEEP ((uint32_t) ((uint32_t)0x4U << 12U)) |
The CM7_1 is in DeepSleep. | |
#define | CY_SYSPM_STATUS_CM7_1_LOWPOWER ((uint32_t) ((uint32_t)0x80U << 24U)) |
The CM7_1 is Low Power mode. More... | |
#define | CY_SYSPM_CM7_1_PWR_CTL_PWR_MODE_RETAINED (2U) |
The define of retained power mode of the CM7_1. More... | |
#define | CY_SYSPM_STATUS_SYSTEM_LP ((uint32_t) ((uint32_t)0x80U)) |
The system is Low Power mode. | |
#define | CY_SYSPM_STATUS_SYSTEM_ULP ((uint32_t) ((uint32_t)0x08U << 8U)) |
The system is in Ultra Low Power mode. | |
#define | CY_SYSPM_STATUS_SYSTEM_LPACTIVE ((uint32_t) ((uint32_t)0x08UL << 16U)) |
The system is LPACTIVE Power mode. | |
#define | CY_SYSPM_STATUS_SYSTEM_MF ((uint32_t) ((uint32_t)0x08UL << 24U)) |
The system is Medium Frequency Low Power mode. | |
#define | CY_SYSPM_STATUS_SYSTEM_OD ((uint32_t) ((uint32_t)0x08UL << 28U)) |
The system is OD Low Power mode. | |
#define | CY_SYSPM_ACTIVE_TO_LP_WAIT_US (1u) |
The wait time for transition of the device from the Active into the LPActive (Low Power Active) | |
#define | CY_SYSPM_LP_TO_ACTIVE_WAIT_BEFORE_US (8u) |
The wait delay time which occurs before the Active reference is settled. More... | |
#define | CY_SYSPM_LP_TO_ACTIVE_WAIT_AFTER_US (1u) |
The wait delay time which occurs after the Active reference is settled. More... | |
#define | CY_SYSPM_WAIT_DELAY_TRYES (100u) |
The internal define of the tries number in the Cy_SysPm_ExitLpMode() function. | |
#define CY_SYSPM_STATUS_CM0_LOWPOWER ((uint32_t) 0x88U << 8U) |
The CM0 is in low power mode, This MACRO is deprecated and will be removed in future release.
It will give incorrect value for CAT1C devices.
#define CY_SYSPM_STATUS_CM7_0_LOWPOWER ((uint32_t) ((uint32_t)0x80U << 16U)) |
The CM7_0 is Low Power mode.
This MACRO is deprecated and will be removed in future release. It will give incorrect value for CAT1C devices.
#define CY_SYSPM_CM7_0_PWR_CTL_PWR_MODE_RETAINED (2U) |
The define of retained power mode of the CM7_0.
This MACRO is deprecated and will be removed in future release. It will give incorrect value for CAT1C devices.
#define CY_SYSPM_STATUS_CM7_1_LOWPOWER ((uint32_t) ((uint32_t)0x80U << 24U)) |
The CM7_1 is Low Power mode.
This MACRO is deprecated and will be removed in future release. It will give incorrect value for CAT1C devices.
#define CY_SYSPM_CM7_1_PWR_CTL_PWR_MODE_RETAINED (2U) |
The define of retained power mode of the CM7_1.
This MACRO is deprecated and will be removed in future release. It will give incorrect value for CAT1C devices.
#define CY_SYSPM_LP_TO_ACTIVE_WAIT_BEFORE_US (8u) |
The wait delay time which occurs before the Active reference is settled.
This delay is used in transition of the device from Active into the LPACTIVE (Low Power Active) mode
#define CY_SYSPM_LP_TO_ACTIVE_WAIT_AFTER_US (1u) |
The wait delay time which occurs after the Active reference is settled.
This delay is used in transition the device from Active into the LPACTIVE (Low Power Active) mode