SPI RX FIFO Statuses

General Description

Macros to check SPI RX FIFO status returned by Cy_SCB_SPI_GetRxFifoStatus function or assign mask for Cy_SCB_SPI_ClearRxFifoStatus function.

Each SPI RX FIFO status is encoded in a separate bit, therefore multiple bits may be set to indicate the current status.

Macros
#define	CY_SCB_SPI_RX_TRIGGER   (SCB_INTR_RX_TRIGGER_Msk)
	The number of entries in the RX FIFO is more than the RX FIFO trigger level value.
#define	CY_SCB_SPI_RX_NOT_EMPTY   (SCB_INTR_RX_NOT_EMPTY_Msk)
	The RX FIFO is not empty, there is data to read.
#define	CY_SCB_SPI_RX_FULL   (SCB_INTR_RX_FULL_Msk)
	The RX FIFO is full. More...
#define	CY_SCB_SPI_RX_OVERFLOW   (SCB_INTR_RX_OVERFLOW_Msk)
	The RX FIFO was full and there was an attempt to write to it. More...
#define	CY_SCB_SPI_RX_UNDERFLOW   (SCB_INTR_RX_UNDERFLOW_Msk)
	An attempt to read from an empty RX FIFO.

Macro Definition Documentation

CY_SCB_SPI_RX_FULL

#define CY_SCB_SPI_RX_FULL   (SCB_INTR_RX_FULL_Msk)

The RX FIFO is full.

There is no more space for additional data. Any additional data will be dropped.

CY_SCB_SPI_RX_OVERFLOW

#define CY_SCB_SPI_RX_OVERFLOW   (SCB_INTR_RX_OVERFLOW_Msk)

The RX FIFO was full and there was an attempt to write to it.

This additional data was dropped.