MTB CAT1 Peripheral driver library
SARMUX Switch Control Register Enums

General Description

This set of enumerations aids in configuring the uint32_t muxSwitch and uint32_t muxSwitchSqCtrl registers.

Enumerations

enum  cy_en_sar_mux_switch_fw_ctrl_t {
  CY_SAR_MUX_FW_P0_VPLUS = SAR_MUX_SWITCH0_MUX_FW_P0_VPLUS_Msk,
  CY_SAR_MUX_FW_P1_VPLUS = SAR_MUX_SWITCH0_MUX_FW_P1_VPLUS_Msk,
  CY_SAR_MUX_FW_P2_VPLUS = SAR_MUX_SWITCH0_MUX_FW_P2_VPLUS_Msk,
  CY_SAR_MUX_FW_P3_VPLUS = SAR_MUX_SWITCH0_MUX_FW_P3_VPLUS_Msk,
  CY_SAR_MUX_FW_P4_VPLUS = SAR_MUX_SWITCH0_MUX_FW_P4_VPLUS_Msk,
  CY_SAR_MUX_FW_P5_VPLUS = SAR_MUX_SWITCH0_MUX_FW_P5_VPLUS_Msk,
  CY_SAR_MUX_FW_P6_VPLUS = SAR_MUX_SWITCH0_MUX_FW_P6_VPLUS_Msk,
  CY_SAR_MUX_FW_P7_VPLUS = SAR_MUX_SWITCH0_MUX_FW_P7_VPLUS_Msk,
  CY_SAR_MUX_FW_P0_VMINUS = SAR_MUX_SWITCH0_MUX_FW_P0_VMINUS_Msk,
  CY_SAR_MUX_FW_P1_VMINUS = SAR_MUX_SWITCH0_MUX_FW_P1_VMINUS_Msk,
  CY_SAR_MUX_FW_P2_VMINUS = SAR_MUX_SWITCH0_MUX_FW_P2_VMINUS_Msk,
  CY_SAR_MUX_FW_P3_VMINUS = SAR_MUX_SWITCH0_MUX_FW_P3_VMINUS_Msk,
  CY_SAR_MUX_FW_P4_VMINUS = SAR_MUX_SWITCH0_MUX_FW_P4_VMINUS_Msk,
  CY_SAR_MUX_FW_P5_VMINUS = SAR_MUX_SWITCH0_MUX_FW_P5_VMINUS_Msk,
  CY_SAR_MUX_FW_P6_VMINUS = SAR_MUX_SWITCH0_MUX_FW_P6_VMINUS_Msk,
  CY_SAR_MUX_FW_P7_VMINUS = SAR_MUX_SWITCH0_MUX_FW_P7_VMINUS_Msk,
  CY_SAR_MUX_FW_VSSA_VMINUS = SAR_MUX_SWITCH0_MUX_FW_VSSA_VMINUS_Msk,
  CY_SAR_MUX_FW_TEMP_VPLUS = SAR_MUX_SWITCH0_MUX_FW_TEMP_VPLUS_Msk,
  CY_SAR_MUX_FW_AMUXBUSA_VPLUS = SAR_MUX_SWITCH0_MUX_FW_AMUXBUSA_VPLUS_Msk,
  CY_SAR_MUX_FW_AMUXBUSB_VPLUS = SAR_MUX_SWITCH0_MUX_FW_AMUXBUSB_VPLUS_Msk,
  CY_SAR_MUX_FW_AMUXBUSA_VMINUS = SAR_MUX_SWITCH0_MUX_FW_AMUXBUSA_VMINUS_Msk,
  CY_SAR_MUX_FW_AMUXBUSB_VMINUS = SAR_MUX_SWITCH0_MUX_FW_AMUXBUSB_VMINUS_Msk,
  CY_SAR_MUX_FW_SARBUS0_VPLUS = SAR_MUX_SWITCH0_MUX_FW_SARBUS0_VPLUS_Msk,
  CY_SAR_MUX_FW_SARBUS1_VPLUS = SAR_MUX_SWITCH0_MUX_FW_SARBUS1_VPLUS_Msk,
  CY_SAR_MUX_FW_SARBUS0_VMINUS = SAR_MUX_SWITCH0_MUX_FW_SARBUS0_VMINUS_Msk,
  CY_SAR_MUX_FW_SARBUS1_VMINUS = SAR_MUX_SWITCH0_MUX_FW_SARBUS1_VMINUS_Msk,
  CY_SAR_MUX_FW_P4_COREIO0 = SAR_MUX_SWITCH0_MUX_FW_P4_COREIO0_Msk,
  CY_SAR_MUX_FW_P5_COREIO1 = SAR_MUX_SWITCH0_MUX_FW_P5_COREIO1_Msk,
  CY_SAR_MUX_FW_P6_COREIO2 = SAR_MUX_SWITCH0_MUX_FW_P6_COREIO2_Msk,
  CY_SAR_MUX_FW_P7_COREIO3 = SAR_MUX_SWITCH0_MUX_FW_P7_COREIO3_Msk
}
 Firmware control for the SARMUX switches to connect analog signals to the SAR ADC. More...
 
enum  cy_en_sar_mux_switch_sq_ctrl_t {
  CY_SAR_MUX_SQ_CTRL_P0 = SAR_MUX_SWITCH_SQ_CTRL_MUX_SQ_CTRL_P0_Msk,
  CY_SAR_MUX_SQ_CTRL_P1 = SAR_MUX_SWITCH_SQ_CTRL_MUX_SQ_CTRL_P1_Msk,
  CY_SAR_MUX_SQ_CTRL_P2 = SAR_MUX_SWITCH_SQ_CTRL_MUX_SQ_CTRL_P2_Msk,
  CY_SAR_MUX_SQ_CTRL_P3 = SAR_MUX_SWITCH_SQ_CTRL_MUX_SQ_CTRL_P3_Msk,
  CY_SAR_MUX_SQ_CTRL_P4 = SAR_MUX_SWITCH_SQ_CTRL_MUX_SQ_CTRL_P4_Msk,
  CY_SAR_MUX_SQ_CTRL_P5 = SAR_MUX_SWITCH_SQ_CTRL_MUX_SQ_CTRL_P5_Msk,
  CY_SAR_MUX_SQ_CTRL_P6 = SAR_MUX_SWITCH_SQ_CTRL_MUX_SQ_CTRL_P6_Msk,
  CY_SAR_MUX_SQ_CTRL_P7 = SAR_MUX_SWITCH_SQ_CTRL_MUX_SQ_CTRL_P7_Msk,
  CY_SAR_MUX_SQ_CTRL_VSSA = SAR_MUX_SWITCH_SQ_CTRL_MUX_SQ_CTRL_VSSA_Msk,
  CY_SAR_MUX_SQ_CTRL_TEMP = SAR_MUX_SWITCH_SQ_CTRL_MUX_SQ_CTRL_TEMP_Msk,
  CY_SAR_MUX_SQ_CTRL_AMUXBUSA = SAR_MUX_SWITCH_SQ_CTRL_MUX_SQ_CTRL_AMUXBUSA_Msk,
  CY_SAR_MUX_SQ_CTRL_AMUXBUSB = SAR_MUX_SWITCH_SQ_CTRL_MUX_SQ_CTRL_AMUXBUSB_Msk,
  CY_SAR_MUX_SQ_CTRL_SARBUS0 = SAR_MUX_SWITCH_SQ_CTRL_MUX_SQ_CTRL_SARBUS0_Msk,
  CY_SAR_MUX_SQ_CTRL_SARBUS1 = SAR_MUX_SWITCH_SQ_CTRL_MUX_SQ_CTRL_SARBUS1_Msk
}
 Mask definitions of SARMUX switches that can be controlled by the SARSEQ. More...
 

Enumeration Type Documentation

◆ cy_en_sar_mux_switch_fw_ctrl_t

Firmware control for the SARMUX switches to connect analog signals to the SAR ADC.

To close multiple switches, "OR" the enum values together.

See the SARMUX and SARSEQ section for more guidance.

Enumerator
CY_SAR_MUX_FW_P0_VPLUS 

Switch between Pin 0 of SARMUX and Vplus of SARADC.

CY_SAR_MUX_FW_P1_VPLUS 

Switch between Pin 1 of SARMUX and Vplus of SARADC.

CY_SAR_MUX_FW_P2_VPLUS 

Switch between Pin 2 of SARMUX and Vplus of SARADC.

CY_SAR_MUX_FW_P3_VPLUS 

Switch between Pin 3 of SARMUX and Vplus of SARADC.

CY_SAR_MUX_FW_P4_VPLUS 

Switch between Pin 4 of SARMUX and Vplus of SARADC.

CY_SAR_MUX_FW_P5_VPLUS 

Switch between Pin 5 of SARMUX and Vplus of SARADC.

CY_SAR_MUX_FW_P6_VPLUS 

Switch between Pin 6 of SARMUX and Vplus of SARADC.

CY_SAR_MUX_FW_P7_VPLUS 

Switch between Pin 7 of SARMUX and Vplus of SARADC.

CY_SAR_MUX_FW_P0_VMINUS 

Switch between Pin 0 of SARMUX and Vminus of SARADC.

CY_SAR_MUX_FW_P1_VMINUS 

Switch between Pin 1 of SARMUX and Vminus of SARADC.

CY_SAR_MUX_FW_P2_VMINUS 

Switch between Pin 2 of SARMUX and Vminus of SARADC.

CY_SAR_MUX_FW_P3_VMINUS 

Switch between Pin 3 of SARMUX and Vminus of SARADC.

CY_SAR_MUX_FW_P4_VMINUS 

Switch between Pin 4 of SARMUX and Vminus of SARADC.

CY_SAR_MUX_FW_P5_VMINUS 

Switch between Pin 5 of SARMUX and Vminus of SARADC.

CY_SAR_MUX_FW_P6_VMINUS 

Switch between Pin 6 of SARMUX and Vminus of SARADC.

CY_SAR_MUX_FW_P7_VMINUS 

Switch between Pin 7 of SARMUX and Vminus of SARADC.

CY_SAR_MUX_FW_VSSA_VMINUS 

Switch between VSSA and Vminus of SARADC.

CY_SAR_MUX_FW_TEMP_VPLUS 

Switch between the DieTemp sensor and vplus of SARADC.

CY_SAR_MUX_FW_AMUXBUSA_VPLUS 

Switch between AMUXBUSA and vplus of SARADC.

CY_SAR_MUX_FW_AMUXBUSB_VPLUS 

Switch between AMUXBUSB and vplus of SARADC.

CY_SAR_MUX_FW_AMUXBUSA_VMINUS 

Switch between AMUXBUSA and vminus of SARADC.

CY_SAR_MUX_FW_AMUXBUSB_VMINUS 

Switch between AMUXBUSB and vminus of SARADC.

CY_SAR_MUX_FW_SARBUS0_VPLUS 

Switch between SARBUS0 and vplus of SARADC.

CY_SAR_MUX_FW_SARBUS1_VPLUS 

Switch between SARBUS1 and vplus of SARADC.

CY_SAR_MUX_FW_SARBUS0_VMINUS 

Switch between SARBUS0 and vminus of SARADC.

CY_SAR_MUX_FW_SARBUS1_VMINUS 

Switch between SARBUS1 and vminus of SARADC.

CY_SAR_MUX_FW_P4_COREIO0 

Switch between Pin 4 of SARMUX and coreio0, if present.

CY_SAR_MUX_FW_P5_COREIO1 

Switch between Pin 5 of SARMUX and coreio1, if present.

CY_SAR_MUX_FW_P6_COREIO2 

Switch between Pin 6 of SARMUX and coreio2, if present.

CY_SAR_MUX_FW_P7_COREIO3 

Switch between Pin 7 of SARMUX and coreio3, if present.

◆ cy_en_sar_mux_switch_sq_ctrl_t

Mask definitions of SARMUX switches that can be controlled by the SARSEQ.

To enable sequencer control of multiple switches, "OR" the enum values together.

See the SARMUX and SARSEQ section for more guidance.

Enumerator
CY_SAR_MUX_SQ_CTRL_P0 

Enable SARSEQ control of Pin 0 switches (for Vplus and Vminus) of SARMUX dedicated port.

CY_SAR_MUX_SQ_CTRL_P1 

Enable SARSEQ control of Pin 1 switches (for Vplus and Vminus) of SARMUX dedicated port.

CY_SAR_MUX_SQ_CTRL_P2 

Enable SARSEQ control of Pin 2 switches (for Vplus and Vminus) of SARMUX dedicated port.

CY_SAR_MUX_SQ_CTRL_P3 

Enable SARSEQ control of Pin 3 switches (for Vplus and Vminus) of SARMUX dedicated port.

CY_SAR_MUX_SQ_CTRL_P4 

Enable SARSEQ control of Pin 4 switches (for Vplus and Vminus) of SARMUX dedicated port.

CY_SAR_MUX_SQ_CTRL_P5 

Enable SARSEQ control of Pin 5 switches (for Vplus and Vminus) of SARMUX dedicated port.

CY_SAR_MUX_SQ_CTRL_P6 

Enable SARSEQ control of Pin 6 switches (for Vplus and Vminus) of SARMUX dedicated port.

CY_SAR_MUX_SQ_CTRL_P7 

Enable SARSEQ control of Pin 7 switches (for Vplus and Vminus) of SARMUX dedicated port.

CY_SAR_MUX_SQ_CTRL_VSSA 

Enable SARSEQ control of the switch between VSSA and Vminus.

CY_SAR_MUX_SQ_CTRL_TEMP 

Enable SARSEQ control of the switch between DieTemp and Vplus.

CY_SAR_MUX_SQ_CTRL_AMUXBUSA 

Enable SARSEQ control of AMUXBUSA switches (for Vplus and Vminus)

CY_SAR_MUX_SQ_CTRL_AMUXBUSB 

Enable SARSEQ control of AMUXBUSB switches (for Vplus and Vminus)

CY_SAR_MUX_SQ_CTRL_SARBUS0 

Enable SARSEQ control of SARBUS0 switches (for Vplus and Vminus)

CY_SAR_MUX_SQ_CTRL_SARBUS1 

Enable SARSEQ control of SARBUS1 switches (for Vplus and Vminus)