To be used with Cy_HPPASS_GetInterruptStatus, Cy_HPPASS_GetInterruptStatusMasked, Cy_HPPASS_ClearInterrupt, Cy_HPPASS_SetInterrupt, Cy_HPPASS_SetInterruptMask, Cy_HPPASS_GetInterruptMask.
Macros | |
#define | CY_HPPASS_INTR_FIFO_0_OVERFLOW (0x01UL) |
Result interrupt mask for the FIFO #0 overflow. | |
#define | CY_HPPASS_INTR_FIFO_1_OVERFLOW (0x02UL) |
Result interrupt mask for the FIFO #1 overflow. | |
#define | CY_HPPASS_INTR_FIFO_2_OVERFLOW (0x04UL) |
Result interrupt mask for the FIFO #2 overflow. | |
#define | CY_HPPASS_INTR_FIFO_3_OVERFLOW (0x08UL) |
Result interrupt mask for the FIFO #3 overflow. | |
#define | CY_HPPASS_INTR_FIFO_0_UNDERFLOW (0x10UL) |
Result interrupt mask for the FIFO #0 underflow. | |
#define | CY_HPPASS_INTR_FIFO_1_UNDERFLOW (0x20UL) |
Result interrupt mask for the FIFO #1 underflow. | |
#define | CY_HPPASS_INTR_FIFO_2_UNDERFLOW (0x40UL) |
Result interrupt mask for the FIFO #2 underflow. | |
#define | CY_HPPASS_INTR_FIFO_3_UNDERFLOW (0x80UL) |
Result interrupt mask for the FIFO #3 underflow. | |
#define | CY_HPPASS_INTR_FIFO_OVERFLOW (HPPASS_MMIO_HPPASS_INTR_FIFO_OVERFLOW_Msk) |
FIFO overflow interrupt mask. | |
#define | CY_HPPASS_INTR_FIFO_UNDERFLOW (HPPASS_MMIO_HPPASS_INTR_FIFO_UNDERFLOW_Msk) |
FIFO underflow interrupt mask. | |
#define | CY_HPPASS_INTR_RESULT_OVERFLOW (HPPASS_MMIO_HPPASS_INTR_RESULT_OVERFLOW_Msk) |
Result overflow interrupt mask. | |
#define | CY_HPPASS_INTR_GROUP_TR_COLLISION (HPPASS_MMIO_HPPASS_INTR_ENTRY_TR_COLLISION_Msk) |
Sequencer Group Trigger Collision interrupt mask. | |
#define | CY_HPPASS_INTR_GROUP_HOLD_VIOLATION (HPPASS_MMIO_HPPASS_INTR_ENTRY_HOLD_VIOLATION_Msk) |
Sequencer Group Hold Violation interrupt mask. | |
#define | CY_HPPASS_INTR_AC_INT (HPPASS_MMIO_HPPASS_INTR_AC_INT_Msk) |
Autonomous Controller interrupt mask. | |
#define | CY_HPPASS_INTR |
Combined interrupt mask. More... | |
#define CY_HPPASS_INTR |
Combined interrupt mask.