MemorySPI command settings.
Data Fields | |
| struct { | |
| mtb_hal_memoryspi_bus_width_t | bus_width |
| Bus width for the instruction. | |
| mtb_hal_memoryspi_datarate_t | data_rate |
| Data rate SDR/DDR. | |
| bool | two_byte_cmd |
| Defines whether cmd is 2-byte value, or 1-byte (if false) | |
| uint16_t | value |
| Instruction value. | |
| bool | disabled |
| Instruction phase skipped if disabled is set to true. | |
| } | instruction |
| Instruction structure. | |
| struct { | |
| mtb_hal_memoryspi_bus_width_t | bus_width |
| Bus width for the address. | |
| mtb_hal_memoryspi_datarate_t | data_rate |
| Data rate SDR/DDR. | |
| mtb_hal_memoryspi_size_t | size |
| Address size. | |
| bool | disabled |
| Address phase skipped if disabled is set to true. | |
| } | address |
| Address structure. | |
| struct { | |
| mtb_hal_memoryspi_bus_width_t | bus_width |
| Bus width for mode bits | |
| mtb_hal_memoryspi_datarate_t | data_rate |
| Data rate SDR/DDR. | |
| mtb_hal_memoryspi_size_t | size |
| Mode bits size. | |
| uint32_t | value |
| Mode bits value. | |
| bool | disabled |
| Mode bits phase skipped if disabled is set to true. | |
| } | mode_bits |
| Mode bits structure. | |
| struct { | |
| mtb_hal_memoryspi_bus_width_t | bus_width |
| Bus width for mode bits | |
| mtb_hal_memoryspi_datarate_t | data_rate |
| Data rate SDR/DDR. | |
| uint32_t | dummy_count |
| Dummy cycles count. | |
| } | dummy_cycles |
| Dummy cycles structure. | |
| struct { | |
| mtb_hal_memoryspi_bus_width_t | bus_width |
| Bus width for data. | |
| mtb_hal_memoryspi_datarate_t | data_rate |
| Data rate SDR/DDR. | |
| } | data |
| Data structure. | |
| struct { ... } mtb_hal_memoryspi_command_t::instruction |
Instruction structure.
| struct { ... } mtb_hal_memoryspi_command_t::address |
Address structure.
| struct { ... } mtb_hal_memoryspi_command_t::mode_bits |
Mode bits structure.
| struct { ... } mtb_hal_memoryspi_command_t::dummy_cycles |
Dummy cycles structure.
| struct { ... } mtb_hal_memoryspi_command_t::data |
Data structure.