Configurator-generated features limitations

List of SMIF personality items, which are currently not supported in QSPI HAL driver on CAT1A/CAT1B devices:

XIP (eXecute In Place) mode
Memory Mode Alignment Error interrupt
RX Data FIFO Underflow interrupt
TX Command FIFO Overflow
TX Data FIFO Overflow interrupt
RX FIFO Level Trigger interrupt
TX FIFO Level Trigger interrupt
RX DMA Trigger
TX DMA Trigger Note: For CAT1D devices, the QSPI SCLK connection is provided with a dedicated pin so NC should be passed for the SCLK pin when calling cyhal_qspi_init.

20829 device clock limitations

Due to specifics of 20829 device clock tree, where multiple peripheral devices are clocked by same HF1, as QSPI HW Block, QSPI HAL driver is not allowed to manipulate frequency by itself. In this case user should allocate and configure their own HF1 clock and pass it as cyhal_clock_t *clk parameter into cyhal_qspi_init function.

Interface clock frequency

Starting MXSMIF HW block version 2 (checked with CY_IP_MXSMIF_VERSION define), QSPI interface clock frequency is twice lower than configured source HF clock, so if QSPI source HF clock is configured, for instance, for 50 MHz, connected memory will be accessed on 25 MHz clock. Interface clock frequency of MXSMIF block with version 1 corresponds to frequency of source HF clock.