Description

Timer/Counter/PWM Counter Module (TCPWM_GRP_CNT)

Data Fields
__IOM uint32_t	CTRL

__IM uint32_t	STATUS

__IOM uint32_t	COUNTER

__IM uint32_t	RESERVED

__IOM uint32_t	CC0

__IOM uint32_t	CC0_BUFF

__IOM uint32_t	CC1

__IOM uint32_t	CC1_BUFF

__IOM uint32_t	PERIOD

__IOM uint32_t	PERIOD_BUFF

__IOM uint32_t	LINE_SEL

__IOM uint32_t	LINE_SEL_BUFF

__IOM uint32_t	DT

__IM uint32_t	RESERVED1 [3]

__IOM uint32_t	TR_CMD

__IOM uint32_t	TR_IN_SEL0

__IOM uint32_t	TR_IN_SEL1

__IOM uint32_t	TR_IN_EDGE_SEL

__IOM uint32_t	TR_PWM_CTRL

__IOM uint32_t	TR_OUT_SEL

__IM uint32_t	RESERVED2 [6]

__IOM uint32_t	INTR

__IOM uint32_t	INTR_SET

__IOM uint32_t	INTR_MASK

__IM uint32_t	INTR_MASKED

Field Documentation

◆ CTRL

__IOM uint32_t TCPWM_GRP_CNT_Type::CTRL

0x00000000 Counter control register

◆ STATUS

__IM uint32_t TCPWM_GRP_CNT_Type::STATUS

0x00000004 Counter status register

◆ COUNTER

__IOM uint32_t TCPWM_GRP_CNT_Type::COUNTER

0x00000008 Counter count register

◆ RESERVED

__IM uint32_t TCPWM_GRP_CNT_Type::RESERVED

◆ CC0

__IOM uint32_t TCPWM_GRP_CNT_Type::CC0

0x00000010 Counter compare/capture 0 register

◆ CC0_BUFF

__IOM uint32_t TCPWM_GRP_CNT_Type::CC0_BUFF

0x00000014 Counter buffered compare/capture 0 register

◆ CC1

__IOM uint32_t TCPWM_GRP_CNT_Type::CC1

0x00000018 Counter compare/capture 1 register

◆ CC1_BUFF

__IOM uint32_t TCPWM_GRP_CNT_Type::CC1_BUFF

0x0000001C Counter buffered compare/capture 1 register

◆ PERIOD

__IOM uint32_t TCPWM_GRP_CNT_Type::PERIOD

0x00000020 Counter period register

◆ PERIOD_BUFF

__IOM uint32_t TCPWM_GRP_CNT_Type::PERIOD_BUFF

0x00000024 Counter buffered period register

◆ LINE_SEL

__IOM uint32_t TCPWM_GRP_CNT_Type::LINE_SEL

0x00000028 Counter line selection register

◆ LINE_SEL_BUFF

__IOM uint32_t TCPWM_GRP_CNT_Type::LINE_SEL_BUFF

0x0000002C Counter buffered line selection register

◆ DT

__IOM uint32_t TCPWM_GRP_CNT_Type::DT

0x00000030 Counter PWM dead time register

◆ RESERVED1

__IM uint32_t TCPWM_GRP_CNT_Type::RESERVED1[3]

◆ TR_CMD

__IOM uint32_t TCPWM_GRP_CNT_Type::TR_CMD

0x00000040 Counter trigger command register

◆ TR_IN_SEL0

__IOM uint32_t TCPWM_GRP_CNT_Type::TR_IN_SEL0

0x00000044 Counter input trigger selection register 0

◆ TR_IN_SEL1

__IOM uint32_t TCPWM_GRP_CNT_Type::TR_IN_SEL1

0x00000048 Counter input trigger selection register 1

◆ TR_IN_EDGE_SEL

__IOM uint32_t TCPWM_GRP_CNT_Type::TR_IN_EDGE_SEL

0x0000004C Counter input trigger edge selection register

◆ TR_PWM_CTRL

__IOM uint32_t TCPWM_GRP_CNT_Type::TR_PWM_CTRL

0x00000050 Counter trigger PWM control register

◆ TR_OUT_SEL

__IOM uint32_t TCPWM_GRP_CNT_Type::TR_OUT_SEL

0x00000054 Counter output trigger selection register

◆ RESERVED2

__IM uint32_t TCPWM_GRP_CNT_Type::RESERVED2[6]

◆ INTR

__IOM uint32_t TCPWM_GRP_CNT_Type::INTR

0x00000070 Interrupt request register

◆ INTR_SET

__IOM uint32_t TCPWM_GRP_CNT_Type::INTR_SET

0x00000074 Interrupt set request register

◆ INTR_MASK

__IOM uint32_t TCPWM_GRP_CNT_Type::INTR_MASK

0x00000078 Interrupt mask register

◆ INTR_MASKED

__IM uint32_t TCPWM_GRP_CNT_Type::INTR_MASKED

0x0000007C Interrupt masked request register