Description

Device (only used for XIP acceses) (SMIF_CORE_DEVICE)

Data Fields
__IOM uint32_t	CTL

__IM uint32_t	RESERVED

__IOM uint32_t	ADDR

__IOM uint32_t	MASK

__IM uint32_t	RESERVED1 [4]

__IOM uint32_t	ADDR_CTL

__IM uint32_t	RESERVED2

__IOM uint32_t	RX_CAPTURE_CONFIG

__IM uint32_t	RESERVED3

__IM uint32_t	RD_STATUS

__IM uint32_t	RESERVED4 [3]

__IOM uint32_t	RD_CMD_CTL

__IOM uint32_t	RD_ADDR_CTL

__IOM uint32_t	RD_MODE_CTL

__IOM uint32_t	RD_DUMMY_CTL

__IOM uint32_t	RD_DATA_CTL

__IOM uint32_t	RD_CRC_CTL

__IOM uint32_t	RD_BOUND_CTL

__IM uint32_t	RESERVED5

__IOM uint32_t	WR_CMD_CTL

__IOM uint32_t	WR_ADDR_CTL

__IOM uint32_t	WR_MODE_CTL

__IOM uint32_t	WR_DUMMY_CTL

__IOM uint32_t	WR_DATA_CTL

__IOM uint32_t	WR_CRC_CTL

__IOM uint32_t	HB_FW_DEL_TAP_SEL_0

__IOM uint32_t	HB_FW_DEL_TAP_SEL_1

Field Documentation

◆ CTL

__IOM uint32_t SMIF_CORE_DEVICE_Type::CTL

0x00000000 Control

◆ RESERVED

__IM uint32_t SMIF_CORE_DEVICE_Type::RESERVED

◆ ADDR

__IOM uint32_t SMIF_CORE_DEVICE_Type::ADDR

0x00000008 Device region base address

◆ MASK

__IOM uint32_t SMIF_CORE_DEVICE_Type::MASK

0x0000000C Device region mask

◆ RESERVED1

__IM uint32_t SMIF_CORE_DEVICE_Type::RESERVED1

◆ ADDR_CTL

__IOM uint32_t SMIF_CORE_DEVICE_Type::ADDR_CTL

0x00000020 Address control

◆ RESERVED2

__IM uint32_t SMIF_CORE_DEVICE_Type::RESERVED2

◆ RX_CAPTURE_CONFIG

__IOM uint32_t SMIF_CORE_DEVICE_Type::RX_CAPTURE_CONFIG

0x00000028 RX capture configuration

◆ RESERVED3

__IM uint32_t SMIF_CORE_DEVICE_Type::RESERVED3

◆ RD_STATUS

__IM uint32_t SMIF_CORE_DEVICE_Type::RD_STATUS

0x00000030 Read status

◆ RESERVED4

__IM uint32_t SMIF_CORE_DEVICE_Type::RESERVED4

◆ RD_CMD_CTL

__IOM uint32_t SMIF_CORE_DEVICE_Type::RD_CMD_CTL

0x00000040 Read command control

◆ RD_ADDR_CTL

__IOM uint32_t SMIF_CORE_DEVICE_Type::RD_ADDR_CTL

0x00000044 Read address control

◆ RD_MODE_CTL

__IOM uint32_t SMIF_CORE_DEVICE_Type::RD_MODE_CTL

0x00000048 Read mode control

◆ RD_DUMMY_CTL

__IOM uint32_t SMIF_CORE_DEVICE_Type::RD_DUMMY_CTL

0x0000004C Read dummy control

◆ RD_DATA_CTL

__IOM uint32_t SMIF_CORE_DEVICE_Type::RD_DATA_CTL

0x00000050 Read data control

◆ RD_CRC_CTL

__IOM uint32_t SMIF_CORE_DEVICE_Type::RD_CRC_CTL

0x00000054 Read Bus CRC control

◆ RD_BOUND_CTL

__IOM uint32_t SMIF_CORE_DEVICE_Type::RD_BOUND_CTL

0x00000058 Read boundary control

◆ RESERVED5

__IM uint32_t SMIF_CORE_DEVICE_Type::RESERVED5

◆ WR_CMD_CTL

__IOM uint32_t SMIF_CORE_DEVICE_Type::WR_CMD_CTL

0x00000060 Write command control

◆ WR_ADDR_CTL

__IOM uint32_t SMIF_CORE_DEVICE_Type::WR_ADDR_CTL

0x00000064 Write address control

◆ WR_MODE_CTL

__IOM uint32_t SMIF_CORE_DEVICE_Type::WR_MODE_CTL

0x00000068 Write mode control

◆ WR_DUMMY_CTL

__IOM uint32_t SMIF_CORE_DEVICE_Type::WR_DUMMY_CTL

0x0000006C Write dummy control

◆ WR_DATA_CTL

__IOM uint32_t SMIF_CORE_DEVICE_Type::WR_DATA_CTL

0x00000070 Write data control

◆ WR_CRC_CTL

__IOM uint32_t SMIF_CORE_DEVICE_Type::WR_CRC_CTL

0x00000074 Write Bus CRC control

◆ HB_FW_DEL_TAP_SEL_0

__IOM uint32_t SMIF_CORE_DEVICE_Type::HB_FW_DEL_TAP_SEL_0

0x00000078 HB FW Calibration Delay Tap Select 0

◆ HB_FW_DEL_TAP_SEL_1

__IOM uint32_t SMIF_CORE_DEVICE_Type::HB_FW_DEL_TAP_SEL_1

0x0000007C HB FW Calibration Delay Tap Select 1