PSOC E8XXGP Device Support Library
PDM_CH_Type Struct Reference

Description

PDM RX structure (PDM_CH)

Data Fields

__IOM uint32_t CTL
 
__IM uint32_t RESERVED [3]
 
__IOM uint32_t IF_CTL
 
__IOM uint32_t CIC_CTL
 
__IOM uint32_t FIR0_CTL
 
__IOM uint32_t FIR1_CTL
 
__IOM uint32_t DC_BLOCK_CTL
 
__IM uint32_t RESERVED1 [23]
 
__IOM uint32_t RX_FIFO_CTL
 
__IM uint32_t RX_FIFO_STATUS
 
__IM uint32_t RX_FIFO_RD
 
__IM uint32_t RX_FIFO_RD_SILENT
 
__IM uint32_t RESERVED2 [12]
 
__IOM uint32_t INTR_RX
 
__IOM uint32_t INTR_RX_SET
 
__IOM uint32_t INTR_RX_MASK
 
__IM uint32_t INTR_RX_MASKED
 
__IM uint32_t RESERVED3 [12]
 

Field Documentation

◆ CTL

__IOM uint32_t PDM_CH_Type::CTL

0x00000000 Control

◆ RESERVED

__IM uint32_t PDM_CH_Type::RESERVED[3]

◆ IF_CTL

__IOM uint32_t PDM_CH_Type::IF_CTL

0x00000010 Interface control

◆ CIC_CTL

__IOM uint32_t PDM_CH_Type::CIC_CTL

0x00000014 CIC control

◆ FIR0_CTL

__IOM uint32_t PDM_CH_Type::FIR0_CTL

0x00000018 FIR 0 control

◆ FIR1_CTL

__IOM uint32_t PDM_CH_Type::FIR1_CTL

0x0000001C FIR 1 control

◆ DC_BLOCK_CTL

__IOM uint32_t PDM_CH_Type::DC_BLOCK_CTL

0x00000020 DC block control

◆ RESERVED1

__IM uint32_t PDM_CH_Type::RESERVED1[23]

◆ RX_FIFO_CTL

__IOM uint32_t PDM_CH_Type::RX_FIFO_CTL

0x00000080 RX FIFO control

◆ RX_FIFO_STATUS

__IM uint32_t PDM_CH_Type::RX_FIFO_STATUS

0x00000084 RX FIFO status

◆ RX_FIFO_RD

__IM uint32_t PDM_CH_Type::RX_FIFO_RD

0x00000088 RX FIFO read

◆ RX_FIFO_RD_SILENT

__IM uint32_t PDM_CH_Type::RX_FIFO_RD_SILENT

0x0000008C RX FIFO silent read

◆ RESERVED2

__IM uint32_t PDM_CH_Type::RESERVED2[12]

◆ INTR_RX

__IOM uint32_t PDM_CH_Type::INTR_RX

0x000000C0 Interrupt

◆ INTR_RX_SET

__IOM uint32_t PDM_CH_Type::INTR_RX_SET

0x000000C4 Interrupt set

◆ INTR_RX_MASK

__IOM uint32_t PDM_CH_Type::INTR_RX_MASK

0x000000C8 Interrupt mask

◆ INTR_RX_MASKED

__IM uint32_t PDM_CH_Type::INTR_RX_MASKED

0x000000CC Interrupt masked

◆ RESERVED3

__IM uint32_t PDM_CH_Type::RESERVED3[12]