Description

Platform IP standard configuration for MIPI-DSI.

(GFXSS_MIPIDSI_MXMIPIDSI)

Data Fields
__IOM uint32_t	CTL

__IOM uint32_t	CLK_CTL

__IM uint32_t	RESERVED [2]

__IOM uint32_t	INTR

__IOM uint32_t	INTR_SET

__IOM uint32_t	INTR_MASK

__IM uint32_t	INTR_MASKED

__IOM uint32_t	DPI_CMD

__IOM uint32_t	DBI_CMD

__IM uint32_t	RESERVED1 [2]

__IOM uint32_t	PHY_FREQ_RANGE

__IOM uint32_t	BIST

__IOM uint32_t	IO_CONTINUITY_TEST

__IOM uint32_t	PLL_TEST_CONFIG1

__IOM uint32_t	PLL_TEST_CONFIG2

__IM uint32_t	PLL_TEST_OBS1

__IM uint32_t	PLL_TEST_OBS2

__IM uint32_t	LP_INTERNAL_LOOPBACK_TEST

__IM uint32_t	RESERVED2 [1004]

Field Documentation

◆ CTL

__IOM uint32_t GFXSS_MIPIDSI_MXMIPIDSI_Type::CTL

0x00000000 IP control.

◆ CLK_CTL

__IOM uint32_t GFXSS_MIPIDSI_MXMIPIDSI_Type::CLK_CTL

0x00000004 Clock control.

◆ RESERVED

__IM uint32_t GFXSS_MIPIDSI_MXMIPIDSI_Type::RESERVED[2]

◆ INTR

__IOM uint32_t GFXSS_MIPIDSI_MXMIPIDSI_Type::INTR

0x00000010 Interrupt status bits.

◆ INTR_SET

__IOM uint32_t GFXSS_MIPIDSI_MXMIPIDSI_Type::INTR_SET

0x00000014 Interrupt set bits.

◆ INTR_MASK

__IOM uint32_t GFXSS_MIPIDSI_MXMIPIDSI_Type::INTR_MASK

0x00000018 Interrupt mask bits.

◆ INTR_MASKED

__IM uint32_t GFXSS_MIPIDSI_MXMIPIDSI_Type::INTR_MASKED

0x0000001C Interrupt masked bits.

◆ DPI_CMD

__IOM uint32_t GFXSS_MIPIDSI_MXMIPIDSI_Type::DPI_CMD

0x00000020 DPI command control.

◆ DBI_CMD

__IOM uint32_t GFXSS_MIPIDSI_MXMIPIDSI_Type::DBI_CMD

0x00000024 DBI command control.

◆ RESERVED1

__IM uint32_t GFXSS_MIPIDSI_MXMIPIDSI_Type::RESERVED1[2]

◆ PHY_FREQ_RANGE

__IOM uint32_t GFXSS_MIPIDSI_MXMIPIDSI_Type::PHY_FREQ_RANGE

0x00000030 PHY frequency range selection.

◆ BIST

__IOM uint32_t GFXSS_MIPIDSI_MXMIPIDSI_Type::BIST

0x00000034 BIST control.

◆ IO_CONTINUITY_TEST

__IOM uint32_t GFXSS_MIPIDSI_MXMIPIDSI_Type::IO_CONTINUITY_TEST

0x00000038 IO continuity test control.

◆ PLL_TEST_CONFIG1

__IOM uint32_t GFXSS_MIPIDSI_MXMIPIDSI_Type::PLL_TEST_CONFIG1

0x0000003C PLL-SoC interface configuration for Test.

◆ PLL_TEST_CONFIG2

__IOM uint32_t GFXSS_MIPIDSI_MXMIPIDSI_Type::PLL_TEST_CONFIG2

0x00000040 PLL-SoC interface configuration for Test.

◆ PLL_TEST_OBS1

__IM uint32_t GFXSS_MIPIDSI_MXMIPIDSI_Type::PLL_TEST_OBS1

0x00000044 PLL Test Observation bits.

◆ PLL_TEST_OBS2

__IM uint32_t GFXSS_MIPIDSI_MXMIPIDSI_Type::PLL_TEST_OBS2

0x00000048 PLL Test Observation bits.

◆ LP_INTERNAL_LOOPBACK_TEST

__IM uint32_t GFXSS_MIPIDSI_MXMIPIDSI_Type::LP_INTERNAL_LOOPBACK_TEST

0x0000004C Low Power internal Loopback Test

◆ RESERVED2

__IM uint32_t GFXSS_MIPIDSI_MXMIPIDSI_Type::RESERVED2[1004]