Platform IP standard configuration for GPU.
(GFXSS_GPU_MXGPU)
Data Fields | |
| __IOM uint32_t | CTL |
| __IM uint32_t | RESERVED [2] |
| __IM uint32_t | STATUS |
| __IOM uint32_t | INTR |
| __IOM uint32_t | INTR_SET |
| __IOM uint32_t | INTR_MASK |
| __IM uint32_t | INTR_MASKED |
| __IOM uint32_t GFXSS_GPU_MXGPU_Type::CTL |
0x00000000 IP control.
| __IM uint32_t GFXSS_GPU_MXGPU_Type::RESERVED[2] |
| __IM uint32_t GFXSS_GPU_MXGPU_Type::STATUS |
0x0000000C IP status.
| __IOM uint32_t GFXSS_GPU_MXGPU_Type::INTR |
0x00000010 Interrupt status bits.
| __IOM uint32_t GFXSS_GPU_MXGPU_Type::INTR_SET |
0x00000014 Interrupt set bits.
| __IOM uint32_t GFXSS_GPU_MXGPU_Type::INTR_MASK |
0x00000018 Interrupt mask bits.
| __IM uint32_t GFXSS_GPU_MXGPU_Type::INTR_MASKED |
0x0000001C Interrupt masked bits.