Functions | |
| void | Cy_SysLib_Delay (uint32_t milliseconds) |
| The function delays by the specified number of milliseconds. More... | |
| void | Cy_SysLib_DelayUs (uint16_t microseconds) |
| The function delays by the specified number of microseconds. More... | |
| void | Cy_SysLib_Rtos_Delay (uint32_t milliseconds) |
| The function is same as Cy_SysLib_Delay. More... | |
| void | Cy_SysLib_Rtos_DelayUs (uint16_t microseconds) |
| The function is same as Cy_SysLib_DelayUs. More... | |
| void | Cy_SysLib_DelayCycles (uint32_t cycles) |
| Delays for the specified number of cycles. More... | |
| void | Cy_SysLib_Halt (uint32_t reason) |
| This function halts the CPU but only the CPU which calls the function. More... | |
| void | Cy_SysLib_AssertFailed (const char_t *file, uint32_t line) |
| This function stores the ASSERT location of the file name (including path to file) and line number in a non-zero init area for debugging. More... | |
| uint64_t | Cy_SysLib_GetUniqueId (void) |
| This function returns the silicon unique ID. More... | |
| cy_en_syslib_status_t | Cy_SysLib_ResetBackupDomain (void) |
| This function resets the backup domain power to avoid the ILO glitch. More... | |
| uint32_t | Cy_SysLib_GetResetReason (void) |
| The function returns the cause for the latest reset(s) that occurred in the system. More... | |
| void | Cy_SysLib_ClearResetReason (void) |
| This function clears the values of RES_CAUSE_EXTEND, RES_CAUSE and RES_CAUSE2. More... | |
| CY_SECTION_INIT_CODECOPY_BEGIN __STATIC_INLINE cy_en_syslib_status_t | Cy_SysLib_GetResetStatus (void) |
| This function returns the BACKUP->RESET bit value. More... | |
| CY_SECTION_INIT_CODECOPY_END void | Cy_SysLib_FaultHandler (uint32_t const *faultStackAddr) |
| This function stores the ARM Cortex registers into a non-zero init area for debugging. More... | |
| void | Cy_SysLib_ProcessingFault (void) |
| This function determines how to process the current fault state. More... | |
| void | Cy_SysLib_SetWaitStates (bool ulpMode, uint32_t clkHfMHz) |
| Sets the number of clock cycles the cache will wait for, before it samples data coming back from ROM, SRAM, and Flash. More... | |
| uint32_t | Cy_SysLib_EnterCriticalSection (void) |
| Cy_SysLib_EnterCriticalSection disables interrupts and returns a value indicating whether the interrupts were previously enabled. More... | |
| void | Cy_SysLib_ExitCriticalSection (uint32_t savedIntrStatus) |
| Re-enables the interrupts if they were enabled before Cy_SysLib_EnterCriticalSection() was called. More... | |
| uint8_t | Cy_SysLib_GetDeviceRevision (void) |
| This function returns a device Revision ID. More... | |
| uint16_t | Cy_SysLib_GetDevice (void) |
| This function returns a device Family ID. More... | |
| cy_en_syslib_lcs_mode_t | Cy_SysLib_GetDeviceLCS (cy_syslib_lcs_data_t *base) |
| This function returns LCS of Device. More... | |
| void | Cy_Syslib_SetWarmBootEntryPoint (uint32_t *entryPoint, bool enable) |
| This function will set Warm boot entry point address to a location read by BootROM. More... | |
| bool | Cy_SysLib_IsDSRAMWarmBootEntry (void) |
| This function will return true if the system woke up(From DS-RAM) through Warm boot, else it will return false. More... | |
| void | Cy_SysLib_ClearDSRAMWarmBootEntryStatus (void) |
| This function clears the Warm Boot entry Status flag. | |
| bool | Cy_Syslib_IsMemCacheable (MPU_Type *mpu, uint32_t addr, uint32_t size) |
| This function checks if the memory address and the size passed falls in the non-cacheable region or not. More... | |
| void Cy_SysLib_Delay | ( | uint32_t | milliseconds | ) |
The function delays by the specified number of milliseconds.
By default, the number of cycles to delay is calculated based on the SystemCoreClock.
| milliseconds | The number of milliseconds to delay. |
| void Cy_SysLib_DelayUs | ( | uint16_t | microseconds | ) |
The function delays by the specified number of microseconds.
By default, the number of cycles to delay is calculated based on the SystemCoreClock.
| microseconds | The number of microseconds to delay. |
| void Cy_SysLib_Rtos_Delay | ( | uint32_t | milliseconds | ) |
The function is same as Cy_SysLib_Delay.
However, this API is declared WEAK providing option for user to overwrite the implementation based on target RTOS.
| milliseconds | The number of milliseconds to delay. |
| void Cy_SysLib_Rtos_DelayUs | ( | uint16_t | microseconds | ) |
The function is same as Cy_SysLib_DelayUs.
However, this API is declared WEAK providing option for user to overwrite the implementation based on target RTOS.
| microseconds | The number of microseconds to delay. |
| void Cy_SysLib_DelayCycles | ( | uint32_t | cycles | ) |
Delays for the specified number of cycles.
The function is implemented in the assembler for each supported compiler.
| cycles | The number of cycles to delay. |
| void Cy_SysLib_Halt | ( | uint32_t | reason | ) |
This function halts the CPU but only the CPU which calls the function.
It doesn't affect other CPUs.
| reason | The value to be used during debugging. |
| void Cy_SysLib_AssertFailed | ( | const char_t * | file, |
| uint32_t | line | ||
| ) |
This function stores the ASSERT location of the file name (including path to file) and line number in a non-zero init area for debugging.
Also it calls the Cy_SysLib_Halt() function to halt the processor.
| file | The file name of the ASSERT location. |
| line | The line number of the ASSERT location. |
| uint64_t Cy_SysLib_GetUniqueId | ( | void | ) |
This function returns the silicon unique ID.
The ID includes Die lot[3]#, Die Wafer#, Die X, Die Y, Die Sort#, Die Minor and Die Year.
| cy_en_syslib_status_t Cy_SysLib_ResetBackupDomain | ( | void | ) |
This function resets the backup domain power to avoid the ILO glitch.
The glitch can occur when the device is reset due to POR/BOD/XRES while the backup voltage is supplied into the system.
| uint32_t Cy_SysLib_GetResetReason | ( | void | ) |
The function returns the cause for the latest reset(s) that occurred in the system.
The reset causes include system faults and device reset on a wakeup from Hibernate mode. For M33SYSCPUSS IP, the reset causes also include an HFCLK error. The return results are consolidated reset causes from reading RES_CAUSE, RES_CAUSE2 and PWR_HIBERNATE token registers.
| Name in M4CPUSS IP | Name in M33SYSCPUSS IP | Name in M7CPUSS IP | Value |
|---|---|---|---|
| CY_SYSLIB_RESET_HWWDT | CY_SYSLIB_RESET_HWWDT | CY_SYSLIB_RESET_HWWDT | 0x00001 (bit0) |
| CY_SYSLIB_RESET_ACT_FAULT | CY_SYSLIB_RESET_ACT_FAULT | CY_SYSLIB_RESET_ACT_FAULT | 0x00002 (bit1) |
| CY_SYSLIB_RESET_DPSLP_FAULT | CY_SYSLIB_RESET_DPSLP_FAULT | CY_SYSLIB_RESET_DPSLP_FAULT | 0x00004 (bit2) |
| CY_SYSLIB_RESET_TC_DBGRESET | CY_SYSLIB_RESET_CSV_WCO_LOSS | CY_SYSLIB_RESET_TC_DBGRESET | 0x00008 (bit3) |
| CY_SYSLIB_RESET_SOFT | CY_SYSLIB_RESET_SOFT | CY_SYSLIB_RESET_SOFT | 0x00010 (bit4) |
| CY_SYSLIB_RESET_SWWDT0 | CY_SYSLIB_RESET_SWWDT0 | CY_SYSLIB_RESET_SWWDT0 | 0x00020 (bit5) |
| CY_SYSLIB_RESET_SWWDT1 | CY_SYSLIB_RESET_SWWDT1 | CY_SYSLIB_RESET_SWWDT1 | 0x00040 (bit6) |
| CY_SYSLIB_RESET_SWWDT2 | CY_SYSLIB_RESET_SWWDT2 | CY_SYSLIB_RESET_SWWDT2 | 0x00080 (bit7) |
| CY_SYSLIB_RESET_SWWDT3 | CY_SYSLIB_RESET_SWWDT3 | CY_SYSLIB_RESET_SWWDT3 | 0x00100 (bit8) |
| 0x00200 (bit9) | |||
| 0x00400 (bit10) | |||
| 0x00800 (bit11) | |||
| 0x01000 (bit12) | |||
| 0x02000 (bit13) | |||
| 0x04000 (bit14) | |||
| 0x08000 (bit15) | |||
| CY_SYSLIB_RESET_HFCLK_LOSS | CY_SYSLIB_RESET_XRES | 0x10000 (bit16) | |
| CY_SYSLIB_RESET_HFCLK_ERR | CY_SYSLIB_RESET_BODVDDD | 0x20000 (bit17) | |
| CY_SYSLIB_RESET_BODVDDA | 0x40000 (bit18) | ||
| CY_SYSLIB_RESET_BODVCCD | 0x80000 (bit19) | ||
| CY_SYSLIB_RESET_OVDVDDD | 0x100000 (bit20) | ||
| CY_SYSLIB_RESET_OVDVDDA | 0x200000 (bit21) | ||
| CY_SYSLIB_RESET_OVDVCCD | 0x400000 (bit22) | ||
| CY_SYSLIB_RESET_OCD_ACT_LINREG | 0x800000 (bit23) | ||
| CY_SYSLIB_RESET_OCD_DPSLP_LINREG | 0x1000000 (bit24) | ||
| CY_SYSLIB_RESET_OCD_REGHC | 0x2000000 (bit25) | ||
| CY_SYSLIB_RESET_PMIC | 0x4000000 (bit26) | ||
| 0x8000000 (bit27) | |||
| CY_SYSLIB_RESET_PXRES | 0x10000000 (bit28) | ||
| CY_SYSLIB_RESET_STRUCT_XRES | 0x20000000 (bit29) | ||
| CY_SYSLIB_RESET_PORVDDD | 0x40000000 (bit30) | ||
| CY_SYSLIB_RESET_HIB_WAKEUP | CY_SYSLIB_RESET_HIB_WAKEUP | CY_SYSLIB_RESET_HIB_WAKEUP | 0x80000000 (bit31) |
| void Cy_SysLib_ClearResetReason | ( | void | ) |
This function clears the values of RES_CAUSE_EXTEND, RES_CAUSE and RES_CAUSE2.
Also it clears PWR_HIBERNATE token, which indicates reset event on waking up from HIBERNATE.
| CY_SECTION_INIT_CODECOPY_BEGIN __STATIC_INLINE cy_en_syslib_status_t Cy_SysLib_GetResetStatus | ( | void | ) |
This function returns the BACKUP->RESET bit value.
It is reused by the Cy_SysLib_ResetBackupDomain itself and also intended to check for CY_SYSLIB_SUCCESS in loop after the Cy_SysLib_ResetBackupDomain call.
| CY_SECTION_INIT_CODECOPY_END void Cy_SysLib_FaultHandler | ( | uint32_t const * | faultStackAddr | ) |
This function stores the ARM Cortex registers into a non-zero init area for debugging.
This function calls Cy_SysLib_ProcessingFault() after storing all information.
| faultStackAddr | The address of the stack pointer, indicates the lowest address in the fault stack frame to be stored. |
| void Cy_SysLib_ProcessingFault | ( | void | ) |
This function determines how to process the current fault state.
By default in case of exception the system will stay in the infinite loop of this function.
| void Cy_SysLib_SetWaitStates | ( | bool | ulpMode, |
| uint32_t | clkHfMHz | ||
| ) |
Sets the number of clock cycles the cache will wait for, before it samples data coming back from ROM, SRAM, and Flash.
Call this function before increasing the HFClk0 High Frequency clock. Call this function optionally after lowering the HFClk0 High Frequency clock in order to improve the CPU performance.
Also, call this function before switching the core supply regulator voltage (LDO or SIMO Buck) from 1.1V to 0.9V. Call this function optionally after switching the core supply regulator voltage from 0.9V to 1.1V in order to improve the CPU performance.
| ulpMode | The device power mode. true if the device should be switched to the ULP mode (nominal voltage of the core supply regulator should be switched to 0.9V); false if the device should be switched to the LP mode (nominal voltage of the core supply regulator should be switched to 1.1V). |
| clkHfMHz | The HFClk0 clock frequency in MHz. Specifying a frequency above the supported maximum will set the wait states as for the maximum frequency. |
| uint32_t Cy_SysLib_EnterCriticalSection | ( | void | ) |
Cy_SysLib_EnterCriticalSection disables interrupts and returns a value indicating whether the interrupts were previously enabled.
| void Cy_SysLib_ExitCriticalSection | ( | uint32_t | savedIntrStatus | ) |
Re-enables the interrupts if they were enabled before Cy_SysLib_EnterCriticalSection() was called.
The argument should be the value returned from Cy_SysLib_EnterCriticalSection().
| savedIntrStatus | Puts the saved interrupts status returned by the Cy_SysLib_EnterCriticalSection(). |
| uint8_t Cy_SysLib_GetDeviceRevision | ( | void | ) |
This function returns a device Revision ID.
| uint16_t Cy_SysLib_GetDevice | ( | void | ) |
This function returns a device Family ID.
| cy_en_syslib_lcs_mode_t Cy_SysLib_GetDeviceLCS | ( | cy_syslib_lcs_data_t * | base | ) |
This function returns LCS of Device.
| base | The pointer to the SRSS instance. |
| void Cy_Syslib_SetWarmBootEntryPoint | ( | uint32_t * | entryPoint, |
| bool | enable | ||
| ) |
This function will set Warm boot entry point address to a location read by BootROM.
This function is used only before entering DeepSleep-RAM and not effective in any other sleep mode. Before entering CY_SYSPM_MODE_DEEPSLEEP_RAM, user needs to set entry point to a function located in RAM Image using Cy_Syslib_SetWarmBootEntryPoint(), refer Cy_SysPm_SetDeepSleepMode().
| entryPoint | Address of the function that needs to be entered after WARM boot. |
| enable | Enables/Disables debugging control after DS-RAM wakeup i.e. warmboot |
| bool Cy_SysLib_IsDSRAMWarmBootEntry | ( | void | ) |
This function will return true if the system woke up(From DS-RAM) through Warm boot, else it will return false.
| bool Cy_Syslib_IsMemCacheable | ( | MPU_Type * | mpu, |
| uint32_t | addr, | ||
| uint32_t | size | ||
| ) |
This function checks if the memory address and the size passed falls in the non-cacheable region or not.
| mpu | Address of the MPU |
| addr | Address of the memory to be checked |
| size | Size of the memory to be checked |