PSOC E8XXGP Device Support Library

General Description

Macros

#define CY_CPU_CORTEX_M0P   (__CORTEX_M == 0U)
 The macro for ARM CORTEX CM0P. More...
 
#define CY_CPU_CORTEX_M4   (__CORTEX_M == 4U)
 The macro for ARM CORTEX CM4. More...
 
#define CY_CPU_CORTEX_M7   (__CORTEX_M == 7U)
 The macro for ARM CORTEX CM7. More...
 
#define CY_CPU_CORTEX_M55   (__CORTEX_M == 55U)
 The macro for ARM CORTEX CM55. More...
 
#define CY_CPU_CORTEX_M33   (__CORTEX_M == 33U)
 The macro for ARM CORTEX CM33. More...
 
#define CY_ARM_FAULT_DEBUG_ENABLED   (1U)
 The macro to enable the Fault Handler.
 
#define CY_ARM_FAULT_DEBUG   (CY_ARM_FAULT_DEBUG_ENABLED)
 The macro defines if the Fault Handler is enabled. More...
 
#define CY_SYSLIB_DELAY_CALIBRATION_FACTOR   1U
 This macro is to be enabled and set appropriately for the CPU's which has branch prediction enabled, so the delay can work accurately. More...
 

Macro Definition Documentation

◆ CY_CPU_CORTEX_M0P

#define CY_CPU_CORTEX_M0P   (__CORTEX_M == 0U)

The macro for ARM CORTEX CM0P.

CM0+ core CPU Code

◆ CY_CPU_CORTEX_M4

#define CY_CPU_CORTEX_M4   (__CORTEX_M == 4U)

The macro for ARM CORTEX CM4.

CM4 core CPU Code

◆ CY_CPU_CORTEX_M7

#define CY_CPU_CORTEX_M7   (__CORTEX_M == 7U)

The macro for ARM CORTEX CM7.

CM7 core CPU Code

◆ CY_CPU_CORTEX_M55

#define CY_CPU_CORTEX_M55   (__CORTEX_M == 55U)

The macro for ARM CORTEX CM55.

CM55 core CPU Code

◆ CY_CPU_CORTEX_M33

#define CY_CPU_CORTEX_M33   (__CORTEX_M == 33U)

The macro for ARM CORTEX CM33.

CM33 core CPU Code

◆ CY_ARM_FAULT_DEBUG

#define CY_ARM_FAULT_DEBUG   (CY_ARM_FAULT_DEBUG_ENABLED)

The macro defines if the Fault Handler is enabled.

Enabled by default.

◆ CY_SYSLIB_DELAY_CALIBRATION_FACTOR

#define CY_SYSLIB_DELAY_CALIBRATION_FACTOR   1U

This macro is to be enabled and set appropriately for the CPU's which has branch prediction enabled, so the delay can work accurately.

CY_SYSLIB_DELAY_CALIBRATION_FACTOR = 1 for CM0P, CM33 and CM4. CY_SYSLIB_DELAY_CALIBRATION_FACTOR = 2 for CM7_0 and CM7_1.