Functions

General Description

Functions
cy_en_sysint_status_t	Cy_SysInt_Init (const cy_stc_sysint_t *config, cy_israddress userIsr)
	Initializes the referenced interrupt by setting the priority and the interrupt vector. More...
cy_israddress	Cy_SysInt_SetVector (IRQn_Type IRQn, cy_israddress userIsr)
	Changes the ISR vector for the interrupt. More...
cy_israddress	Cy_SysInt_GetVector (IRQn_Type IRQn)
	Gets the address of the current ISR vector for the interrupt. More...
void	Cy_SysInt_SetNmiSource (cy_en_sysint_nmi_t nmiNum, IRQn_Type intrSrc)
	Sets the interrupt source of the CPU core NMI. More...
IRQn_Type	Cy_SysInt_GetNmiSource (cy_en_sysint_nmi_t nmiNum)
	Gets the interrupt source of the CPU core NMI for the given NMI source number. More...
void	Cy_SysInt_SoftwareTrig (IRQn_Type IRQn)
	Triggers an interrupt using software (Not applicable for CM0+). More...

Function Documentation

Cy_SysInt_Init()

cy_en_sysint_status_t Cy_SysInt_Init	(	const cy_stc_sysint_t *	config,
		cy_israddress	userIsr
	)

Initializes the referenced interrupt by setting the priority and the interrupt vector.

In case of CM33 with Security Extension enabled, if this function is called from secure world then, the parameters are used to configure secure interrupt. If it is called form non-secure world then the parameters are used to configure non-secure interrupt. In case of CM33 without Security Extension, this function always configures the non-secure interrupt. In case of CM55, this function always configures the non-secure interrupt.

Use the CMSIS core function NVIC_EnableIRQ(config.intrSrc) to enable the interrupt.

Parameters

config	Interrupt configuration structure
userIsr	Address of the ISR

Returns

Initialization status

Note

CM33
The interrupt vector will be relocated only if the vector table was moved to __s_vector_table_rw and __ns_vector_table_rw for secure and non-secure world respectively.

CM55
The interrupt vector will be relocated only if the vector table was moved to __ns_vector_table_rw non-secure world.

Function Usage

 
    /* Scenario: Vector table is relocated to RAM in __ramVectors[] */
 
    /* Prototype of ISR function for port interrupt 0. For CY_IP_M7CPUSS port 21 is configured */
    void Interrupt_Handler_Port0 (void);
 
    /* Initialize the interrupt with vector at Interrupt_Handler_Port0() */
    Cy_SysInt_Init(&intrCfg, &Interrupt_Handler_Port0);
 
    /* Enable the interrupt */
#if (CY_IP_M7CPUSS)
    NVIC_EnableIRQ((IRQn_Type) NvicMux3_IRQn);
#else
    NVIC_EnableIRQ(intrCfg.intrSrc);
#endif
 

Cy_SysInt_SetVector()

cy_israddress Cy_SysInt_SetVector	(	IRQn_Type	IRQn,
		cy_israddress	userIsr
	)

Changes the ISR vector for the interrupt.

CM33:
When called from secure world. this function relies on the assumption that the vector table is relocated to __s_vector_table_rw[] in secure SRAM. Otherwise it will return the address of the default ISR location in the secure flash/ROM vector table.

When called from non-secure world. this function relies on the assumption that the vector table is relocated to __ns_vector_table_rw[] in non-secure SRAM. Otherwise it will return the address of the default ISR location in the non-secure flash/ROM vector table.

CM55:
This function relies on the assumption that the vector table is relocated to __ns_vector_table_rw[] in non-secure SRAM. Otherwise it will return the address of the default ISR location in the non-secure flash/ROM vector table.

Use the CMSIS core function NVIC_EnableIRQ(config.intrSrc) to enable the interrupt.

Parameters

IRQn	Interrupt source
userIsr	Address of the ISR to set in the interrupt vector table

Returns

Previous address of the ISR in the interrupt vector table

Note

In case of CM33 with Security Extension enabled, if this function is called from secure world then, it sets the interrupt vector for the secure world. If it is called form non-secure world then it sets the interrupt vector for the non-secure world.

Function Usage

 
    /* Scenario: Vector table is relocated to RAM in __ramVectors[]. The interrupt
                 was initialized with the "intrCfg" configuration struct. */
 
    /* Prototype of ISR function for port interrupt 0 */
    void Interrupt_Handler_Port0 (void);
 
    if(&Interrupt_Handler_Port0 != Cy_SysInt_GetVector(intrCfg.intrSrc))
    {
        /* Set the port0 interrupt vector to be at Interrupt_Handler_Port0() */
        (void)Cy_SysInt_SetVector(intrCfg.intrSrc, &Interrupt_Handler_Port0);
    }
 

Cy_SysInt_GetVector()

cy_israddress Cy_SysInt_GetVector

(

IRQn_Type

IRQn

)

Gets the address of the current ISR vector for the interrupt.

CM33:
When called from the secure world, this function relies on the assumption that the vector table is relocated to __ns_vector_table_rw[] in non-secure SRAM. Otherwise it will return the address of the default ISR location in the flash/ROM vector table.

CM55:
This function relies on the assumption that the vector table is relocated to __ns_vector_table_rw[] in non-secure SRAM. Otherwise it will return the address of the default ISR location in the flash/ROM vector table.

Parameters

IRQn	Interrupt source

Returns

Address of the ISR in the interrupt vector table

Note

In case of CM33 with Security Extension enabled, if this function is called from secure world then, it sets the interrupt vector for the secure world. If it is called form non-secure world then it sets the interrupt vector for the non-secure world.

Function Usage

 
    /* Scenario: Vector table is relocated to RAM in __ramVectors[]. The interrupt
                 was initialized with the "intrCfg" configuration struct. */
 
    /* Prototype of ISR function for port interrupt 0 */
    void Interrupt_Handler_Port0 (void);
 
    if(&Interrupt_Handler_Port0 != Cy_SysInt_GetVector(intrCfg.intrSrc))
    {
        /* Set the port0 interrupt vector to be at Interrupt_Handler_Port0() */
        (void)Cy_SysInt_SetVector(intrCfg.intrSrc, &Interrupt_Handler_Port0);
    }
 

Cy_SysInt_SetNmiSource()

void Cy_SysInt_SetNmiSource	(	cy_en_sysint_nmi_t	nmiNum,
		IRQn_Type	intrSrc
	)

Sets the interrupt source of the CPU core NMI.

The interrupt source must be a positive number. Setting the value to "unconnected_IRQn" or "disconnected_IRQn" disconnects the interrupt source from the NMI. Depending on the device, the number of interrupt sources that can provide the NMI trigger signal to the core can vary.

Parameters

nmiNum

NMI source number. CPUSS_ver2 allows up to 4 sources to trigger the core NMI.

Function Usage

 
    /* Scenario: Set the NMI trigger source for the processor of interest. The
                 interrupt was initialized with the "intrCfg" configuration struct. */
#if (CY_CPU_CORTEX_M0P) || (CY_CPU_CORTEX_M7)
    if(disconnected_IRQn == Cy_SysInt_GetNmiSource(CY_SYSINT_NMI1))
#else /* CM4 */
    if(unconnected_IRQn == Cy_SysInt_GetNmiSource(CY_SYSINT_NMI1))
#endif /* CY_CPU_CORTEX_M0P */
    {
        /* Set the NMI source to GPIO port 0 interrupt */
        Cy_SysInt_SetNmiSource(CY_SYSINT_NMI1, ioss_interrupts_gpio_0_IRQn);
    }
 

Cy_SysInt_GetNmiSource()

IRQn_Type Cy_SysInt_GetNmiSource

(

cy_en_sysint_nmi_t

nmiNum

)

Gets the interrupt source of the CPU core NMI for the given NMI source number.

Parameters

nmiNum

NMI source number. CPUSS_ver2 allows up to 4 sources to trigger the core NMI (i.e. #1, 2, 3, 4).

Returns

Interrupt Source.

Function Usage

 
    /* Scenario: Set the NMI trigger source for the processor of interest. The
                 interrupt was initialized with the "intrCfg" configuration struct. */
#if (CY_CPU_CORTEX_M0P) || (CY_CPU_CORTEX_M7)
    if(disconnected_IRQn == Cy_SysInt_GetNmiSource(CY_SYSINT_NMI1))
#else /* CM4 */
    if(unconnected_IRQn == Cy_SysInt_GetNmiSource(CY_SYSINT_NMI1))
#endif /* CY_CPU_CORTEX_M0P */
    {
        /* Set the NMI source to GPIO port 0 interrupt */
        Cy_SysInt_SetNmiSource(CY_SYSINT_NMI1, ioss_interrupts_gpio_0_IRQn);
    }
 

Cy_SysInt_SoftwareTrig()

void Cy_SysInt_SoftwareTrig

(

IRQn_Type

IRQn

)

Triggers an interrupt using software (Not applicable for CM0+).

Parameters

IRQn	Interrupt source

Function Usage

 
    /* Scenario: Trigger the CM4 interrupt line connected to the GPIO port 0
                 interrupt from software. */
 
    /* Enter processor privileged mode */
    __set_CONTROL(0);
 
    /* Trigger the ioss_interrupts_gpio_0_IRQn interrupt using software */
    Cy_SysInt_SoftwareTrig(ioss_interrupts_gpio_0_IRQn);
 
    /* Enter processor user mode */
    __set_CONTROL(1);
 

Note

Only privileged software can enable unprivileged access to the Software Trigger Interrupt Register (STIR). This function is not available for devices with an M7 CPU.