PSOC E8XXGP Device Support Library
Data Structures

General Description

Data Structures

struct  cy_stc_i3c_ibi_t
 I3C device IBI structure. More...
 
struct  cy_stc_i3c_target_ccc_resp_t
 I3C CCC response structure for Target mode. More...
 
struct  cy_stc_i2c_device_t
 I2C device structure. More...
 
struct  cy_stc_i3c_device_t
 I3C device structure. More...
 
struct  cy_stc_i3c_controller_devlist_t
 A local list of devices on the bus. More...
 
struct  cy_stc_i3c_dev_char_t
 Device Characteristic Table structure. More...
 
struct  cy_stc_i3c_ccc_t
 64-bit CCC structure More...
 
struct  cy_stc_i3c_config_t
 I3C bus configuration structure. More...
 
struct  cy_stc_i3c_ccc_payload_t
 I3C CCC command payload structure. More...
 
struct  cy_stc_i3c_ccc_cmd_t
 I3C CCC command structure. More...
 
struct  cy_stc_i3c_controller_t
 I3C Controller information. More...
 
struct  cy_stc_i3c_hdr_cmd_t
 I3C HDR command Structure. More...
 
struct  cy_stc_i3c_context_t
 I3C context structure. More...
 
struct  cy_stc_i3c_controller_xfer_config_t
 The I3C Controller transfer structure. More...
 
struct  cy_stc_i3c_ccc_events_t
 ENEC/DISEC CCC payload structure. More...
 
struct  cy_stc_i3c_ccc_mrwl_t
 SETMWL/GETMWL CCC payload structure. More...
 
struct  cy_stc_i3c_ccc_mrl_t
 SETMRL/GETMRL CCC payload structure. More...
 
struct  cy_stc_i3c_ccc_getxtime_t
 GETXTIME CCC payload structure. More...
 
struct  cy_stc_i3c_ccc_dev_desc_t
 I3C/I2C device descriptor used for DEFTGTS. More...
 
struct  cy_stc_i3c_ccc_deftgts_t
 DEFTGTS CCC payload structure. More...
 
struct  cy_stc_i3c_ccc_setda_t
 SETNEWDA and SETDASA CCCs payload structure. More...
 
struct  cy_stc_i3c_ccc_getpid_t
 GETPID CCC payload structure. More...
 
struct  cy_stc_i3c_ccc_getbcr_t
 GETBCR CCC payload structure. More...
 
struct  cy_stc_i3c_ccc_getdcr_t
 GETDCR CCC payload structure. More...
 
struct  cy_stc_i3c_ccc_getstatus_t
 GETSTATUS CCC payload structure. More...
 
struct  cy_stc_i3c_ccc_getacccr_t
 GETACCCR CCC payload structure. More...
 
struct  cy_stc_i3c_ccc_getmxds_t
 GETMXDS CCC payload structure. More...
 
struct  cy_stc_i3c_ccc_gethdrcap_t
 GETHDRCAP CCC payload structure. More...
 
struct  cy_stc_i3c_ccc_rstact_t
 RSTACT CCC payload structure. More...
 
struct  cy_stc_i3c_ccc_devctrl_t
 DEVCTRL CCC payload structure. More...
 
union  cy_stc_i3c_controller_devlist_t.__unnamed26__
 I2C/I3C device descriptor. More...
 
union  cy_stc_i3c_hdr_cmd_t.data
 Input/Output buffer. More...
 
union  cy_stc_i3c_ccc_dev_desc_t.__unnamed29__
 

Typedefs

typedef void(* cy_cb_i3c_handle_events_t) (uint32_t event)
 Provides the typedef for the callback function called in the Cy_I3C_Interrupt to notify the user about occurrences of I3C Callback Events.
 
typedef void(* cy_cb_i3c_handle_ccc_response_t) (cy_stc_i3c_target_ccc_resp_t *cccData)
 Provides the typedef for the callback function called in the Cy_I3C_Interrupt to notify ccc response received by target.
 
typedef void(* cy_cb_i3c_handle_ibi_t) (cy_stc_i3c_ibi_t *event)
 Provides the typedef for the callback function called in the Cy_I3C_Interrupt to notify the user about occurrences of I3C Callback Events.
 

Enumerations

enum  cy_en_i3c_devctrl_addrMsk_t {
  UNICAST_CMD = 0x00U ,
  MULTICAST_CMD = 0x03U ,
  BROADCAST_CMD = 0x07U
}
 DEVCTRL Address Mask. More...
 
enum  cy_en_i3c_devctrl_start_offset_t {
  BYTE0 ,
  BYTE1 ,
  BYTE2 ,
  BYTE3
}
 DEVCTRL Start Offset. More...
 
enum  cy_en_i3c_devctrl_pec_bl_t {
  ONE_BYTE ,
  TWO_BYTE ,
  THREE_BYTE ,
  FOUR_BYTE
}
 DEVCTRL PEC Burst Length. More...
 

Data Structure Documentation

◆ cy_stc_i3c_ibi_t

struct cy_stc_i3c_ibi_t
Data Fields
cy_en_i3c_ibi_type_t event IBI event type.
uint8_t targetAddress Address of the device requesting IBI.
uint32_t status IBI Status.

Indicates the controller response for the received IBI

uint8_t payloadSize IBI Payload size.

Indicates the size of the received IBI Payload

uint8_t * payload Below attributes are used only in target mode operations.

IBI Payload Data. Indicates the IBI Payload, For I3C Target mode max 4 bytes supported

uint8_t mdb IBI Mandatory Data Byte(MDB).

To be sent after IBI

◆ cy_stc_i3c_target_ccc_resp_t

struct cy_stc_i3c_target_ccc_resp_t
Data Fields
uint8_t cmd CCC command id.
uint8_t db Defining Byte.
uint8_t len data length
bool rxRsp Transaction type receive response.

◆ cy_stc_i2c_device_t

struct cy_stc_i2c_device_t
Data Fields
uint8_t staticAddress Static address of the I2C device.
uint8_t lvr Legacy Virtual Register.

◆ cy_stc_i3c_device_t

struct cy_stc_i3c_device_t
Data Fields
uint64_t provisionalID 48 bit provisional ID of I3C device
uint8_t dcr Device Characteristic Register of I3C device.
uint8_t bcr Bus Characteristic Register of I3C device.
uint8_t staticAddress Static address of the I3C device if used.
uint8_t dynamicAddress Desired dynamic address for I3C device.

If set to zero, available free address will be assigned by I3C controller.

uint8_t ibipayloadSize IBI payload length in bytes of target devices.
uint16_t mrl Max private SDR read length in bytes.
uint16_t mwl Max private SDR write length in bytes.
uint8_t maxReadDs Max read speed information.
uint8_t maxWriteDs Max write speed information.
uint8_t maxReadTurnaround[3U] Max read turn-around time in micro -seconds.
uint8_t HDRCap Supported HDR modes.
bool ATM0Supported Supports Asynchronous timing mode0.
bool PECEnabled Packet Error Check Enabled.
bool hdrSupport Support for HDR Mode.

true: HDR modes supported. HDRCap member for the device is valid. false: HDR modes are not supported.

bool speedLimit Max data speed limitation.

true: Limitation on max data speed. maxReadDs, maxWriteDs, maxReadTurnaround members for the device are valid false: No limitation on max data speed

◆ cy_stc_i3c_controller_devlist_t

struct cy_stc_i3c_controller_devlist_t
Data Fields
bool i2c Identifies the device type.
union cy_stc_i3c_controller_devlist_t.__unnamed26__ __unnamed__ I2C/I3C device descriptor.

◆ cy_stc_i3c_dev_char_t

struct cy_stc_i3c_dev_char_t
Data Fields
uint32_t LSBProvisionalID The LSB 32-bit value of provisional ID.
uint32_t MSBProvisionalID The MSB 16-bit value of provisional ID.
uint32_t DCR_BCR DCR [7:0] and BCR [15:8] of the I3C device.
uint32_t dynamicAddress Dynamic address [7:0] of the I3C device.

◆ cy_stc_i3c_ccc_t

struct cy_stc_i3c_ccc_t
Data Fields
uint32_t cmdHigh cmdHigh
uint32_t cmdLow cmdLow

◆ cy_stc_i3c_config_t

struct cy_stc_i3c_config_t
Data Fields
cy_en_i3c_mode_t i3cMode Specifies the mode of I3C controller operation.
cy_en_i3c_bus_mode_t i3cBusMode Specifies the mode of I3C bus operation.
bool useDma Use the SDMA for Rx/Tx.
bool manualDataRate True - Enables the user to configure data rate related parameters for Controller Mode.
uint32_t i3cClockHz The frequency of the clock connected to the I3C block in Hz.
uint32_t i3cSclRate The desired I3C data Rate in Hz.
uint32_t openDrainSclRate Opendrain data rate in Hz.
cy_en_i3c_buffer_depth_t txEmptyBufThld Specifies the number of empty locations(or above) in the Transmit FIFO that triggers the Transmit Buffer Threshold Status interrupt.
cy_en_i3c_buffer_depth_t rxBufThld Specifies the number of entries (or above) in the Receive FIFO that triggers the Receive Buffer Threshold Status interrupt.
cy_en_i3c_buffer_depth_t txBufStartThld Controller Mode : Specifies the number of Transmit FIFO filled locations count that triggers the transmission.

Target Mode : Specifies the number of Transmit FIFO filled locations count that triggers the transmission.

cy_en_i3c_buffer_depth_t rxBufStartThld Controller Mode : Specifies the number of empty locations count in the Receive FIFO that triggers the reception.

Target Mode : Specifies the number of empty locations count in the Receive FIFO that triggers the transmission.

bool ibaInclude Below members are only applicable for the Controller mode.

True - I3C broadcast address (0x7E) is used for private transfer

bool hotJoinCtrl Specifies whether the Controller ACK/NACK the Hot-Join request from Target.
uint8_t dynamicAddr Specifies the device Dynamic Address.
uint32_t cmdQueueEmptyThld Specifies the number of empty locations(or greater) in the Command Queue that triggers the Command Queue Ready Status interrupt.
uint32_t respQueueThld Specifies the number of entries(or greater) in the Response Queue that triggers the Response Queue Ready Status interrupt.
uint32_t ibiQueueThld Specifies the number of IBI status entries(or greater) in the IBI Queue that triggers the IBI Buffer Threshold Status interrupt.
uint32_t ibiDataThld Specifies IBI data segment size in words (4 bytes) that enables the slicing of the incoming IBI data and generate individual status and thereby promotes the cut-through operation in reading out the IBI data.
uint8_t sdaHoldTime SDA hold time (in terms of number of I3C block clock cycles) of the transmit data with respect to the SCL edge in FM, FM+, SDR and DDR speed mode of operations.
uint16_t busFreeTime Specifies the I3C bus free count value.
uint8_t openDrainLowCnt I3C Open Drain low count value.
uint8_t openDrainHighCnt I3C Open Drain high count value.
uint8_t pushPullLowCnt I3C Push Pull low count value.
uint8_t pushPullHighCnt I3C Push Pull high count value.
uint8_t i2cFMLowCnt I2C FM Mode low count value.
uint8_t i2cFMHighCnt I2C FM Mode high count value.
uint8_t i2cFMPlusLowCnt I2C FM Plus Mode low count value.
uint8_t i2cFMPlusHighCnt I2C FM Plus Mode high count value.
uint8_t extLowCnt1 I3C Extended Low Count for SDR1 Mode.
uint8_t extLowCnt2 I3C Extended Low Count for SDR2 Mode.
uint8_t extLowCnt3 I3C Extended Low Count for SDR3 Mode.
uint8_t extLowCnt4 I3C Extended Low Count for SDR4 Mode.
uint8_t extTerminationLowCnt I3C Read Termination Bit Low count.
bool adaptiveI2CI3C Below members are only applicable for the Target mode.

Specifies whether the target uses adaptive I2C I3C mode. It is required to be set only if the device is not aware of the type of the bus to which the target controller is connected

uint8_t staticAddress The static address of the I3C Target Device, if present.
uint64_t pid The Provisional ID of the I3C Target Device.
uint8_t dcr The device characteristic value of the I3C Target Device.
bool speedLimit Max data speed limitation.

True: Limitation on max data speed. maxReadDs, maxWriteDs, maxReadTurnaround members for the device are valid False: No limitation on max data speed

bool hdrCapable SDR only or SDR and HDR capable True: SDR and HDR False: SDR only.
cy_en_i3c_mode_t deviceRoleCap Specifies the Device Role field in Bus Characteristic Register.
bool hotjoinEnable Specifies whether the Hot-Join Request Interrupts are allowed on the I3C bus or not When disabled the Target will not initiate Hot-Join and will take part in Address Assignment without initiating Hot-Join.
uint16_t busAvailTime Specifies the I3C bus available count value.
uint32_t busIdleTime Specifies the I3C bus idle count value.

◆ cy_stc_i3c_ccc_payload_t

struct cy_stc_i3c_ccc_payload_t
Data Fields
uint16_t len Payload length.
void * data Payload data.

◆ cy_stc_i3c_ccc_cmd_t

struct cy_stc_i3c_ccc_cmd_t
Data Fields
uint8_t cmd CCC command id.
bool dbp Defining Byte Present.
uint8_t db Defining Byte.
cy_stc_i3c_ccc_payload_t * data CCC command payload or NULL.
uint8_t address Destination address.

◆ cy_stc_i3c_controller_t

struct cy_stc_i3c_controller_t
Data Fields
unsigned long addrslotsStatusArray[((CY_I3C_MAX_ADDR+1U) *2U)/CY_I3C_BITS_PER_LONG] Two bits per address to depict the status of the addresses - 8*4*8.
uint8_t lastAddress immediate last address, from the address list, assigned as dynamic address to the target device
uint32_t freePos Index of the free position with respect to the Device Address Table.
uint32_t devCount The number of devices on the bus.
uint32_t i2cDeviceCount Count of I2C devices on the bus.
uint32_t dynAddrDevCount Number of dynamically addressed devices.

◆ cy_stc_i3c_hdr_cmd_t

struct cy_stc_i3c_hdr_cmd_t
Data Fields
uint8_t code Command opcode.

Bit 7 encodes the direction of the data transfer, if set this is a read, otherwise this is a write.

uint32_t ndatawords Number of data words (a word is 16bits wide) to transfer.
union cy_stc_i3c_hdr_cmd_t.data data Input/Output buffer.

◆ cy_stc_i3c_context_t

struct cy_stc_i3c_context_t

◆ cy_stc_i3c_controller_xfer_config_t

struct cy_stc_i3c_controller_xfer_config_t
Data Fields
uint8_t targetAddress The 7-bit right justified target address to communicate with.
uint8_t * buffer The pointer to the buffer for data to read from the target or data to write into the target.
uint32_t bufferSize The size of the buffer.
bool toc toc

◆ cy_stc_i3c_ccc_events_t

struct cy_stc_i3c_ccc_events_t
Data Fields
uint8_t events bitmask of CY_I3C_CCC_EVENT_xxx events

◆ cy_stc_i3c_ccc_mrwl_t

struct cy_stc_i3c_ccc_mrwl_t
Data Fields
uint16_t len maximum read/write length in bytes
uint8_t payloadSize Optional IBI Payload size.

◆ cy_stc_i3c_ccc_mrl_t

struct cy_stc_i3c_ccc_mrl_t
Data Fields
uint16_t readLen maximum read/write length in bytes
uint8_t payloadSize Optional IBI Payload size.

◆ cy_stc_i3c_ccc_getxtime_t

struct cy_stc_i3c_ccc_getxtime_t
Data Fields
uint8_t supportedModes Bit mask indicating which Timing Control Mode(s) the Target supports.
uint8_t state Bit mask indicating which Timing Control Mode (if any) is currently enabled for the Target and overflow bit.
uint8_t frequency Byte representing the Frequency of the Targets internal oscillator, in increments of 0.5 MHz.
uint8_t inaccuracy Byte representing the maximum variation of the Targets internal oscillator in 1/10th percent (0.1%) increments.

◆ cy_stc_i3c_ccc_dev_desc_t

struct cy_stc_i3c_ccc_dev_desc_t
Data Fields
uint8_t dynAddress dynamic address assigned to the I3C target or 0 if the entry is describing an I2C Target
union cy_stc_i3c_ccc_dev_desc_t.__unnamed29__ __unnamed__
uint8_t bcr BCR value or 0 if this entry is describing an I2C target.
uint8_t staticAddress static address or 0 if the device does not have a static address

◆ cy_stc_i3c_ccc_deftgts_t

struct cy_stc_i3c_ccc_deftgts_t
Data Fields
uint8_t count number of dev descriptors
cy_stc_i3c_ccc_dev_desc_t controller descriptor describing the current controller
cy_stc_i3c_ccc_dev_desc_t targets[CY_I3C_MAX_DEVS] array of descriptors describing targets controlled by the current controller

◆ cy_stc_i3c_ccc_setda_t

struct cy_stc_i3c_ccc_setda_t
Data Fields
uint8_t address dynamic address to assign to an I3C device

◆ cy_stc_i3c_ccc_getpid_t

struct cy_stc_i3c_ccc_getpid_t
Data Fields
uint8_t pid[6U] 48 bits PID in big endian

◆ cy_stc_i3c_ccc_getbcr_t

struct cy_stc_i3c_ccc_getbcr_t
Data Fields
uint8_t bcr BCR (Bus Characteristic Register) value.

◆ cy_stc_i3c_ccc_getdcr_t

struct cy_stc_i3c_ccc_getdcr_t
Data Fields
uint8_t dcr DCR (Device Characteristic Register) value.

◆ cy_stc_i3c_ccc_getstatus_t

struct cy_stc_i3c_ccc_getstatus_t
Data Fields
uint16_t status status of the I3C target (see I3C_CCC_STATUS_xxx macros for more information

◆ cy_stc_i3c_ccc_getacccr_t

struct cy_stc_i3c_ccc_getacccr_t
Data Fields
uint8_t newcontroller address of the controller taking bus ownership

◆ cy_stc_i3c_ccc_getmxds_t

struct cy_stc_i3c_ccc_getmxds_t
Data Fields
uint8_t maxwr write limitations
uint8_t maxrd read limitations
uint8_t maxrdturn[3U] maximum read turn-around expressed micro-seconds and little-endian formatted

◆ cy_stc_i3c_ccc_gethdrcap_t

struct cy_stc_i3c_ccc_gethdrcap_t
Data Fields
uint8_t modes bitmap of supported HDR modes
uint8_t getcapByte2 second byte for getcaps ccc
uint8_t getcapByte3 third byte for getcaps ccc
uint8_t getcapByte4 forth byte for getcaps ccc

◆ cy_stc_i3c_ccc_rstact_t

struct cy_stc_i3c_ccc_rstact_t
Data Fields
uint8_t resetTime time required for reset

◆ cy_stc_i3c_ccc_devctrl_t

struct cy_stc_i3c_ccc_devctrl_t
Data Fields
cy_en_i3c_devctrl_addrMsk_t addrMask Broadcast, Uni-cast or Multi-cast Command Selection.
cy_en_i3c_devctrl_start_offset_t startOffset Starting Byte of command.
cy_en_i3c_devctrl_pec_bl_t PEC_BL Burst length of DEVCTRL data packet.
bool regMod general or device specific register mode
uint8_t devID 7-bit device address
uint8_t payloadByte0 payload Byte 0
uint8_t payloadByte1 payload Byte 1
uint8_t payloadByte2 payload Byte 2
uint8_t payloadByte3 payload Byte 3

◆ cy_stc_i3c_controller_devlist_t.__unnamed26__

union cy_stc_i3c_controller_devlist_t.__unnamed26__
Data Fields
cy_stc_i3c_device_t i3cDevice
cy_stc_i2c_device_t i2cDevice

◆ cy_stc_i3c_hdr_cmd_t.data

union cy_stc_i3c_hdr_cmd_t.data
Data Fields
uint16_t * in
const uint16_t * out

◆ cy_stc_i3c_ccc_dev_desc_t.__unnamed29__

union cy_stc_i3c_ccc_dev_desc_t.__unnamed29__
Data Fields
uint8_t dcr DCR value (not applicable to entries describing I2C devices)
uint8_t lvr LVR value (not applicable to entries describing I3C devices)

Enumeration Type Documentation

◆ cy_en_i3c_devctrl_addrMsk_t

DEVCTRL Address Mask.

Enumerator
UNICAST_CMD 

UniCast Command, Target devices responds if address matches with devID.

MULTICAST_CMD 

Multicast Command, Target devices respond if address matches with devID[6:3].

BROADCAST_CMD 

Broadcast Command, All Target devices responds.

◆ cy_en_i3c_devctrl_start_offset_t

DEVCTRL Start Offset.

Enumerator
BYTE0 

Start byte 0.

BYTE1 

Start byte 1.

BYTE2 

Start byte 2.

BYTE3 

Start byte 3.

◆ cy_en_i3c_devctrl_pec_bl_t

DEVCTRL PEC Burst Length.

Enumerator
ONE_BYTE 

Burst Length of 1 byte.

TWO_BYTE 

Burst Length of 2 byte.

THREE_BYTE 

Burst Length of 3 byte.

FOUR_BYTE 

Burst Length of 4 byte.