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#define | CY_AUTANALOG_PRB_NUM (2U) |
| | The number of programmable reference voltage blocks, for more details, refer to the device Architecture Technical Reference Manual.
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#define | CY_AUTANALOG_PRIORITY_ENABLER_NUM (4U) |
| | The number of configurations for priority enabler, for more details, refer to the device Architecture Technical Reference Manual.
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#define | CY_AUTANALOG_INT_CTB0_COMP0 (LPPASS_MMIO_INTR_CAUSE_CTBL0_COMP0_INT_Msk) |
| | CTB0 COMP0 interrupt.
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#define | CY_AUTANALOG_INT_CTB0_COMP1 (LPPASS_MMIO_INTR_CAUSE_CTBL0_COMP1_INT_Msk) |
| | CTB0 COMP1 interrupt.
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#define | CY_AUTANALOG_INT_CTB1_COMP0 (LPPASS_MMIO_INTR_CAUSE_CTBL1_COMP0_INT_Msk) |
| | CTB1 COMP0 interrupt.
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#define | CY_AUTANALOG_INT_CTB1_COMP1 (LPPASS_MMIO_INTR_CAUSE_CTBL1_COMP1_INT_Msk) |
| | CTB1 COMP1 interrupt.
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#define | CY_AUTANALOG_INT_PTC0_COMP0 (LPPASS_MMIO_INTR_CAUSE_PTC_COMP0_INT_Msk) |
| | PTC0 COMP0 interrupt.
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#define | CY_AUTANALOG_INT_PTC0_COMP1 (LPPASS_MMIO_INTR_CAUSE_PTC_COMP1_INT_Msk) |
| | PTC0 COMP1 interrupt.
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#define | CY_AUTANALOG_INT_PTC0_RANGE0 (LPPASS_MMIO_INTR_CAUSE_PTC_RANGE0_INT_Msk) |
| | PTC0 RANGE0 interrupt.
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#define | CY_AUTANALOG_INT_PTC0_RANGE1 (LPPASS_MMIO_INTR_CAUSE_PTC_RANGE1_INT_Msk) |
| | PTC0 RANGE1 interrupt.
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#define | CY_AUTANALOG_INT_DAC0_RANGE0 (LPPASS_MMIO_INTR_CAUSE_DAC0_RANGE0_INT_Msk) |
| | DAC0 RANGE0 interrupt.
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#define | CY_AUTANALOG_INT_DAC0_RANGE1 (LPPASS_MMIO_INTR_CAUSE_DAC0_RANGE1_INT_Msk) |
| | DAC0 RANGE1 interrupt.
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#define | CY_AUTANALOG_INT_DAC0_RANGE2 (LPPASS_MMIO_INTR_CAUSE_DAC0_RANGE2_INT_Msk) |
| | DAC0 RANGE2 interrupt.
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#define | CY_AUTANALOG_INT_DAC0_EPOCH (LPPASS_MMIO_INTR_CAUSE_DAC0_EPOCH_INT_Msk) |
| | DAC0 EPOCH interrupt.
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#define | CY_AUTANALOG_INT_DAC0_EMPTY (LPPASS_MMIO_INTR_CAUSE_DAC0_EMPTY_INT_Msk) |
| | DAC0 EMPTY interrupt.
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#define | CY_AUTANALOG_INT_DAC1_RANGE0 (LPPASS_MMIO_INTR_CAUSE_DAC1_RANGE0_INT_Msk) |
| | DAC1 RANGE0 interrupt.
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#define | CY_AUTANALOG_INT_DAC1_RANGE1 (LPPASS_MMIO_INTR_CAUSE_DAC1_RANGE1_INT_Msk) |
| | DAC1 RANGE1 interrupt.
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#define | CY_AUTANALOG_INT_DAC1_RANGE2 (LPPASS_MMIO_INTR_CAUSE_DAC1_RANGE2_INT_Msk) |
| | DAC1 RANGE2 interrupt.
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#define | CY_AUTANALOG_INT_DAC1_EPOCH (LPPASS_MMIO_INTR_CAUSE_DAC1_EPOCH_INT_Msk) |
| | DAC1 EPOCH interrupt.
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#define | CY_AUTANALOG_INT_DAC1_EMPTY (LPPASS_MMIO_INTR_CAUSE_DAC1_EMPTY_INT_Msk) |
| | DAC1 EMPTY interrupt.
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#define | CY_AUTANALOG_INT_SAR0_DONE (LPPASS_MMIO_INTR_CAUSE_SAR_DONE_INT_Msk) |
| | SAR0 DONE interrupt.
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#define | CY_AUTANALOG_INT_SAR0_EOS (LPPASS_MMIO_INTR_CAUSE_SAR_EOS_INT_Msk) |
| | SAR0 EOS interrupt.
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#define | CY_AUTANALOG_INT_SAR0_RESULT (LPPASS_MMIO_INTR_CAUSE_SAR_RESULT_INT_Msk) |
| | SAR0 RESULT interrupt.
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#define | CY_AUTANALOG_INT_SAR0_RANGE0 (LPPASS_MMIO_INTR_CAUSE_SAR_RANGE0_INT_Msk) |
| | SAR0 RANGE0 interrupt.
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#define | CY_AUTANALOG_INT_SAR0_RANGE1 (LPPASS_MMIO_INTR_CAUSE_SAR_RANGE1_INT_Msk) |
| | SAR0 RANGE1 interrupt.
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#define | CY_AUTANALOG_INT_SAR0_RANGE2 (LPPASS_MMIO_INTR_CAUSE_SAR_RANGE2_INT_Msk) |
| | SAR0 RANGE2 interrupt.
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#define | CY_AUTANALOG_INT_SAR0_RANGE3 (LPPASS_MMIO_INTR_CAUSE_SAR_RANGE3_INT_Msk) |
| | SAR0 RANGE3 interrupt.
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#define | CY_AUTANALOG_INT_SAR0_FIR0_RESULT (LPPASS_MMIO_INTR_CAUSE_SAR_FIR0_RESULT_INT_Msk) |
| | SAR0 FIR0 RESULT interrupt.
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#define | CY_AUTANALOG_INT_SAR0_FIR1_RESULT (LPPASS_MMIO_INTR_CAUSE_SAR_FIR1_RESULT_INT_Msk) |
| | SAR0 FIR1 RESULT interrupt.
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#define | CY_AUTANALOG_INT_AC (LPPASS_MMIO_INTR_CAUSE_AC_INT_Msk) |
| | AC interrupt.
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#define | CY_AUTANALOG_DRV_VERSION_MAJOR 2 |
| | Driver major version.
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#define | CY_AUTANALOG_DRV_VERSION_MINOR 0 |
| | Driver minor version.
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#define | CY_AUTANALOG_ID CY_PDL_DRV_ID(0x76UL) |
| | The driver identifier for the Autonomous Analog driver.
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