Cypress CapSense Middleware Library
cy_stc_capsense_common_config_t Struct Reference

Description

Common configuration structure.

Data Fields

uint32_t cpuClkHz
 CPU clock in Hz.
 
uint32_t periClkHz
 Peripheral clock in Hz.
 
uint16_t vdda
 VDDA in mV.
 
uint16_t numPin
 Total number of IOs. More...
 
uint16_t numSns
 The total number of sensors. More...
 
uint8_t numWd
 Total number of widgets.
 
uint8_t csdEn
 CSD sensing method enabled, at least one CSD widget is configured.
 
uint8_t csxEn
 CSX sensing method enabled, at least one CSX widget is configured.
 
uint8_t mfsEn
 Multi-frequency Scan (MFS) enabled.
 
uint8_t positionFilterEn
 Position filtering enabled.
 
uint8_t periDividerType
 Peripheral clock type (8- or 16-bit type)
 
uint8_t periDividerIndex
 Peripheral divider index.
 
uint8_t analogWakeupDelay
 Time needed to establish correct operation of the CSD HW block after power up or deep sleep. More...
 
uint8_t ssIrefSource
 Iref source.
 
uint8_t ssVrefSource
 Vref source.
 
uint16_t proxTouchCoeff
 Proximity touch coefficient in percentage used in SmartSense.
 
uint8_t swSensorAutoResetEn
 Sensor auto reset enabled.
 
uint8_t portCmodPadNum
 Number of port of dedicated Cmod pad.
 
uint8_t pinCmodPad
 Position of the dedicated Cmod pad in the port.
 
uint8_t portCshPadNum
 Number of port of dedicated Csh pad.
 
uint8_t pinCshPad
 Position of the dedicated Csh pad in the port.
 
uint8_t portShieldPadNum
 Number of port of dedicated Shield pad.
 
uint8_t pinShieldPad
 Position of the dedicated Shield pad in the port.
 
uint8_t portVrefExtPadNum
 Number of port of dedicated VrefExt pad.
 
uint8_t pinVrefExtPad
 Position of the dedicated VrefExt pad in the port.
 
uint8_t portCmodNum
 Number of port of Cmod pin.
 
cy_stc_capsense_idac_gain_table_t idacGainTable [CY_CAPSENSE_IDAC_GAIN_NUMBER]
 Table with the supported IDAC gains and corresponding register values.
 
CSD_Type * ptrCsdBase
 Pointer to the CSD HW block register.
 
cy_stc_csd_context_t * ptrCsdContext
 Pointer to the CSD driver context.
 
GPIO_PRT_Type * portCmod
 Pointer to the base port register of the Cmod pin.
 
GPIO_PRT_Type * portCsh
 Pointer to the base port register of the Csh pin.
 
GPIO_PRT_Type * portCintA
 Pointer to the base port register of the CintA pin.
 
GPIO_PRT_Type * portCintB
 Pointer to the base port register of the CintB pin.
 
uint8_t pinCmod
 Position of the Cmod pin in the port.
 
uint8_t portCshNum
 Number of port of Csh pin.
 
uint8_t pinCsh
 Position of the Csh pin in the port.
 
uint8_t pinCintA
 Position of the CintA pin in the port.
 
uint8_t pinCintB
 Position of the CintB pin in the port.
 
uint8_t csdShieldEn
 Shield enabled.
 
uint8_t csdInactiveSnsConnection
 Inactive sensor connection state: More...
 
uint8_t csdShieldDelay
 Shield signal delay.
 
uint16_t csdVref
 Vref for CSD method.
 
uint16_t csdRConst
 Sensor resistance in series used by SmartSense.
 
uint8_t csdCTankShieldEn
 Csh enabled.
 
uint8_t csdShieldNumPin
 Number of shield IOs.
 
uint8_t csdShieldSwRes
 Shield switch resistance.
 
uint8_t csdInitSwRes
 Switch resistance at coarse initialization.
 
uint8_t csdChargeTransfer
 IDAC sensing configuration.
 
uint8_t csdRawTarget
 Raw count target in percentage for CSD calibration.
 
uint8_t csdAutotuneEn
 SmartSense enabled.
 
uint8_t csdIdacAutocalEn
 CSD IDAC calibration enabled.
 
uint8_t csdIdacGainInit
 IDAC gain index per idacGainTable.
 
uint8_t csdIdacAutoGainEn
 IDAC gain autocalibration enabled.
 
uint8_t csdCalibrationError
 Acceptable calibration error.
 
uint8_t csdIdacGainIndexDefault
 The highest IDAC gain index in CSD calibration per idacGainTable.
 
uint8_t csdIdacMin
 Min acceptable IDAC value in CSD calibration.
 
uint8_t csdIdacCompEn
 Compensation IDAC enabled.
 
uint8_t csdFineInitTime
 Number of dummy SnsClk periods at fine initialization.
 
uint8_t csdIdacRowColAlignEn
 Row-Column alignment enabled. More...
 
uint8_t csdMfsDividerOffsetF1
 Frequency divider offset for channel 1. More...
 
uint8_t csdMfsDividerOffsetF2
 Frequency divider offset for channel 2. More...
 
uint8_t csxRawTarget
 Raw count target in percentage for CSX calibration.
 
uint8_t csxIdacGainInit
 IDAC gain for CSX method.
 
uint8_t csxRefGain
 Refgen gain for CSX method.
 
uint8_t csxIdacAutocalEn
 CSX IDAC calibration enabled.
 
uint8_t csxCalibrationError
 Acceptable calibration error.
 
uint8_t csxFineInitTime
 Number of dummy TX periods at fine initialization.
 
uint8_t csxInitSwRes
 Switch resistance at fine initialization.
 
uint8_t csxScanSwRes
 Switch resistance at scanning.
 
uint8_t csxInitShieldSwRes
 Switch resistance at fine initialization.
 
uint8_t csxScanShieldSwRes
 Switch resistance at scanning.
 
uint8_t csxMfsDividerOffsetF1
 Frequency divider offset for channel 1. More...
 
uint8_t csxMfsDividerOffsetF2
 Frequency divider offset for channel 2. More...
 

Field Documentation

◆ numPin

uint16_t cy_stc_capsense_common_config_t::numPin

Total number of IOs.

◆ numSns

uint16_t cy_stc_capsense_common_config_t::numSns

The total number of sensors.

It is equal to the number of objects with raw count.

  • For CSD widgets: WD_NUM_ROWS + WD_NUM_COLS
  • For CSX widgets: WD_NUM_ROWS * WD_NUM_COLS

◆ analogWakeupDelay

uint8_t cy_stc_capsense_common_config_t::analogWakeupDelay

Time needed to establish correct operation of the CSD HW block after power up or deep sleep.

◆ csdInactiveSnsConnection

uint8_t cy_stc_capsense_common_config_t::csdInactiveSnsConnection

Inactive sensor connection state:

  • CY_CAPSENSE_SNS_CONNECTION_HIGHZ
  • CY_CAPSENSE_SNS_CONNECTION_SHIELD
  • CY_CAPSENSE_SNS_CONNECTION_GROUND

◆ csdIdacRowColAlignEn

uint8_t cy_stc_capsense_common_config_t::csdIdacRowColAlignEn

Row-Column alignment enabled.

It adjusts modulator IDAC for rows and for columns to achieve the similar sensitivity

◆ csdMfsDividerOffsetF1

uint8_t cy_stc_capsense_common_config_t::csdMfsDividerOffsetF1

Frequency divider offset for channel 1.

This value is added to base (channel 0) SnsClk divider to form channel 1 frequency

◆ csdMfsDividerOffsetF2

uint8_t cy_stc_capsense_common_config_t::csdMfsDividerOffsetF2

Frequency divider offset for channel 2.

This value is added to base (channel 0) SnsClk divider to form channel 2 frequency

◆ csxMfsDividerOffsetF1

uint8_t cy_stc_capsense_common_config_t::csxMfsDividerOffsetF1

Frequency divider offset for channel 1.

This value is added to base (channel 0) Tx divider to form channel 1 frequency

◆ csxMfsDividerOffsetF2

uint8_t cy_stc_capsense_common_config_t::csxMfsDividerOffsetF2

Frequency divider offset for channel 2.

This value is added to base (channel 0) Tx divider to form channel 2 frequency