General Description

This section describes the HPI macros.

Macros
#define	CY_HPI_NO_OF_PD_PORTS_MAX (2U)
	Maximum number of PD ports supported. More...

#define	CY_SROM_API_PARAM_SIZE (8U)
	Size of flash write SROM API parameters in bytes. More...

#define	CY_HPI_MAX_FLASH_ROW_SIZE (256U)
	Maximum supported flash row size. More...

#define	CY_HPI_ADDR_I2C_CFG_LOW (0x40)
	I2C slave address used for HPI interface, when the I2C_CFG pin is sensed as LOW. More...

#define	CY_HPI_ADDR_I2C_CFG_HIGH (0x42)
	I2C slave address used for HPI interface, when the I2C_CFG pin is sensed as HIGH. More...

#define	CY_HPI_ADDR_I2C_CFG_FLOAT (0x08)
	I2C slave address used for HPI interface, when the I2C_CFG pin is sensed as FLOATING. More...

#define	CY_HPI_MAX_ALTMODE_COUNT (8U)
	Maximum number of Alternate modes for which mode data can be stored. More...

#define	CY_HPI_DEVICE_RESERVED_COUNT (CY_HPI_DEV_REG_RESPONSE - CY_HPI_DEV_REG_DEV_CONTROL - 1)
	Number of reserved device space registers. More...

#define	CY_HPI_USERDEF_REG_COUNT (16U)
	Number of user-defined HPI registers supported. More...

#define	CY_HPI_GET_SCB_IDX(scb_p) (uint8_t)(((uint32_t)(scb_p) - (uint32_t)SCB0_BASE) >> 0x10U)
	Macro to get the SCB index. More...

#define	CY_HPI_UCSI_READ_PENDING_EVENT (7U)
	UCSI Read Pending status bit in INTERRUPT register. More...

#define	CY_HPI_UCSI_READ_PENDING_MASK (1u << CY_HPI_UCSI_READ_PENDING_EVENT)
	Mask is applied for UCSI Read Pending Event. More...

#define	CY_HPI_UCSI_REG_OFFSET_MASK (0x0FFFU)
	Mask to retrieve UCSI register offset. More...

#define	CY_HPI_UCSI_EVT_EXT_SUPPLY_CHANGED (0x0002U)
	UCSI External Supply Changed Event bit. More...

#define	CY_HPI_UCSI_EVT_CAP_CHANGED (0x0020U)
	UCSI Capability Changed Event bit. More...

#define	CY_HPI_UCSI_EVT_PD_CONTRACT_CHANGED (0x0040U)
	UCSI PD Contract Changed Event bit. More...

#define	CY_HPI_AUTO_EPR_ENABLE_MASK (0x80U)
	Automatic EPR Enable Mask bits. More...

#define	CY_HPI_VALID_EPR_MASK (0x3FU)
	Valid EPR Mask bits. More...

Macro Definition Documentation

◆ CY_HPI_NO_OF_PD_PORTS_MAX

#define CY_HPI_NO_OF_PD_PORTS_MAX (2U)

Maximum number of PD ports supported.

◆ CY_SROM_API_PARAM_SIZE

#define CY_SROM_API_PARAM_SIZE (8U)

Size of flash write SROM API parameters in bytes.

◆ CY_HPI_MAX_FLASH_ROW_SIZE

#define CY_HPI_MAX_FLASH_ROW_SIZE (256U)

Maximum supported flash row size.

◆ CY_HPI_ADDR_I2C_CFG_LOW

#define CY_HPI_ADDR_I2C_CFG_LOW (0x40)

I2C slave address used for HPI interface, when the I2C_CFG pin is sensed as LOW.

◆ CY_HPI_ADDR_I2C_CFG_HIGH

#define CY_HPI_ADDR_I2C_CFG_HIGH (0x42)

I2C slave address used for HPI interface, when the I2C_CFG pin is sensed as HIGH.

◆ CY_HPI_ADDR_I2C_CFG_FLOAT

#define CY_HPI_ADDR_I2C_CFG_FLOAT (0x08)

I2C slave address used for HPI interface, when the I2C_CFG pin is sensed as FLOATING.

◆ CY_HPI_MAX_ALTMODE_COUNT

#define CY_HPI_MAX_ALTMODE_COUNT (8U)

Maximum number of Alternate modes for which mode data can be stored.

◆ CY_HPI_DEVICE_RESERVED_COUNT

#define CY_HPI_DEVICE_RESERVED_COUNT (CY_HPI_DEV_REG_RESPONSE - CY_HPI_DEV_REG_DEV_CONTROL - 1)

Number of reserved device space registers.

◆ CY_HPI_USERDEF_REG_COUNT

#define CY_HPI_USERDEF_REG_COUNT (16U)

Number of user-defined HPI registers supported.

◆ CY_HPI_GET_SCB_IDX

#define CY_HPI_GET_SCB_IDX ( scb_p ) (uint8_t)(((uint32_t)(scb_p) - (uint32_t)SCB0_BASE) >> 0x10U)

Macro to get the SCB index.

◆ CY_HPI_UCSI_READ_PENDING_EVENT

#define CY_HPI_UCSI_READ_PENDING_EVENT (7U)

UCSI Read Pending status bit in INTERRUPT register.

Note: In the AMD TED platform, bit 3 of the INTERRUPT register is used to indicate that a UCSI read is pending. This is changed to bit 7 in the final spec that is released to other customers. Change as necessary.

◆ CY_HPI_UCSI_READ_PENDING_MASK

#define CY_HPI_UCSI_READ_PENDING_MASK (1u << CY_HPI_UCSI_READ_PENDING_EVENT)

Mask is applied for UCSI Read Pending Event.

◆ CY_HPI_UCSI_REG_OFFSET_MASK

#define CY_HPI_UCSI_REG_OFFSET_MASK (0x0FFFU)

Mask to retrieve UCSI register offset.

◆ CY_HPI_UCSI_EVT_EXT_SUPPLY_CHANGED

#define CY_HPI_UCSI_EVT_EXT_SUPPLY_CHANGED (0x0002U)

UCSI External Supply Changed Event bit.

◆ CY_HPI_UCSI_EVT_CAP_CHANGED

#define CY_HPI_UCSI_EVT_CAP_CHANGED (0x0020U)

UCSI Capability Changed Event bit.

◆ CY_HPI_UCSI_EVT_PD_CONTRACT_CHANGED

#define CY_HPI_UCSI_EVT_PD_CONTRACT_CHANGED (0x0040U)

UCSI PD Contract Changed Event bit.

◆ CY_HPI_AUTO_EPR_ENABLE_MASK

#define CY_HPI_AUTO_EPR_ENABLE_MASK (0x80U)

Automatic EPR Enable Mask bits.

◆ CY_HPI_VALID_EPR_MASK

#define CY_HPI_VALID_EPR_MASK (0x3FU)

Valid EPR Mask bits.