Settings Macros

General Description

Settings macros.

Macros
#define	CY_CAPSENSE_SCAN_MODE_INT_DRIVEN   (0u)
	Interrupt Driven scanning mode.
#define	CY_CAPSENSE_SCAN_MODE_DMA_DRIVEN   (1u)
	DMA Driven scanning mode.
#define	CY_CAPSENSE_AMUX_SENSOR_CONNECTION_METHOD   (0u)
	Sensor connection method through analog mux bus.
#define	CY_CAPSENSE_CTRLMUX_SENSOR_CONNECTION_METHOD   (1u)
	Sensor connection method through control mux switches.
#define	CY_CAPSENSE_CIC_FILTER   (0u)
	CIC filter mode.
#define	CY_CAPSENSE_CIC2_FILTER   (1u)
	CIC2 filter mode.
#define	CY_CAPSENSE_MAX_DECIMATION_RATE   (255u)
	Maximum CIC2 Decimation Rate.
#define	CY_CAPSENSE_CIC2_MIN_VALID_SAMPLES   (2u)
	CIC2 filter minimum valid sample number.
#define	CY_CAPSENSE_CIC2_MAX_VALID_SAMPLES   (515u)
	CIC2 filter maximum valid sample number.
#define	CY_CAPSENSE_COUNTER_MODE_SATURATE   (0u)
	Raw count counter mode saturate.
#define	CY_CAPSENSE_COUNTER_MODE_OVERFLOW   (1u)
	Raw count counter mode overflow.
#define	CY_CAPSENSE_SYNC_MODE_OFF   (0u)
	Synchronization mode is disabled.
#define	CY_CAPSENSE_SYNC_EXTERNAL   (1u)
	Synchronization is external.
#define	CY_CAPSENSE_SYNC_INTERNAL   (2u)
	Synchronization is internal.
#define	CY_CAPSENSE_UNDEFINED_GROUP   (0u)
	Sensing group undefined used at initialization.
#define	CY_CAPSENSE_CSD_GROUP   (1u)
	CSD sensing group.
#define	CY_CAPSENSE_CSX_GROUP   (2u)
	CSX sensing group.
#define	CY_CAPSENSE_BIST_GROUP   (3u)
	BIST group.
#define	CY_CAPSENSE_BIST_CSD_GROUP   (4u)
	BIST CSD sensor capacitance measurement group.
#define	CY_CAPSENSE_BIST_CSX_GROUP   (5u)
	BIST CSX sensor capacitance measurement group.
#define	CY_CAPSENSE_BIST_SHIELD_GROUP   (6u)
	BIST shield capacitance measurement group.
#define	CY_CAPSENSE_ISX_GROUP   (10u)
	ISX sensing group.
#define	CY_CAPSENSE_MPSC_GROUP   (11u)
	MPSC-D sensing group.
#define	CY_CAPSENSE_REG_MODE_NUMBER   (6u)
	Total number of mode templates.
#define	CY_CAPSENSE_SCW_FUNC_PIN_STATE_IDX_UNDEFINED   (255u)
	Pin function undefined.
#define	CY_CAPSENSE_CTRLMUX_PIN_STATE_GND   (0u)
	Control mux switch state is ground.
#define	CY_CAPSENSE_CTRLMUX_PIN_STATE_HIGH_Z   (1u)
	Control mux switch state is High-Z.
#define	CY_CAPSENSE_CTRLMUX_PIN_STATE_TX   (2u)
	Control mux switch state defined as CSX Tx electrode.
#define	CY_CAPSENSE_CTRLMUX_PIN_STATE_TX_NEGATIVE   (4u)
	Control mux switch state defined as CSX Negative Tx electrode.
#define	CY_CAPSENSE_CTRLMUX_PIN_STATE_RX   (3u)
	Control mux switch state defined as CSX Rx electrode.
#define	CY_CAPSENSE_CTRLMUX_PIN_STATE_SNS   (5u)
	Control mux switch state defined as CSD sensor.
#define	CY_CAPSENSE_CTRLMUX_PIN_STATE_SHIELD   (6u)
	Control mux switch state defined as connection to shield signal.
#define	CY_CAPSENSE_CTRLMUX_PIN_STATE_VDDA2   (7u)
	Control mux switch state defined as CSDBUSC connected electrode.
#define	CY_CAPSENSE_PIN_STATE_IDX_UNDEFINED   (255u)
	Pin function undefined.
#define	CY_CAPSENSE_PIN_STATE_IDX_GND   (0u)
	Pin function is ground.
#define	CY_CAPSENSE_PIN_STATE_IDX_HIGH_Z   (1u)
	Pin function is High-Z.
#define	CY_CAPSENSE_PIN_STATE_IDX_CSX_RX   (2u)
	Pin function is CSX Rx electrode.
#define	CY_CAPSENSE_PIN_STATE_IDX_CSX_TX   (3u)
	Pin function is CSX Tx electrode.
#define	CY_CAPSENSE_PIN_STATE_IDX_CSX_NEG_TX   (4u)
	Pin function is CSX Negative Tx electrode.
#define	CY_CAPSENSE_PIN_STATE_IDX_CSD_SNS   (5u)
	Pin function is CSD sensor.
#define	CY_CAPSENSE_PIN_STATE_IDX_ISX_LX   (6u)
	Pin function is ISX Lx electrode.
#define	CY_CAPSENSE_PIN_STATE_IDX_ISX_RX   (7u)
	Pin function is ISX Rx electrode.
#define	CY_CAPSENSE_PIN_STATE_IDX_ACT_SHIELD   (8u)
	Pin function is Active shield.
#define	CY_CAPSENSE_PIN_STATE_IDX_PAS_SHIELD   (9u)
	Pin function is Passive shield.
#define	CY_CAPSENSE_PIN_STATE_IDX_CSX_VDDA2   (10u)
	Pin function is CSX VDDA/2 connection.
#define	CY_CAPSENSE_PIN_STATE_IDX_MPSC_CSP   (11u)
	Pin function is MPSC CSP connection.
#define	CY_CAPSENSE_PIN_STATE_IDX_MPSC_CSN   (12u)
	Pin function is MPSC CSN connection.
#define	CY_CAPSENSE_PIN_STATE_IDX_MPSC_CSZ   (13u)
	Pin function is MPSC CSZ connection.
#define	CY_CAPSENSE_CTRLMUX_PIN_STATE_NUMBER   (14u)
	Number of CTRLMUX Pin States for LP.
#define	CY_CAPSENSE_CTRLMUX_PIN_STATE_MASK_NUMBER   (3u)
	Number of CTRLMUX Pin State MASK registers.
#define	CY_CAPSENSE_CSD_SS_DIS   (0x00u)
	Manual tuning mode.
#define	CY_CAPSENSE_CSD_SS_HW_EN   (0x01u)
	Hardware auto-tune mask.
#define	CY_CAPSENSE_CSD_SS_TH_EN   (0x02u)
	Threshold auto-tune mask.
#define	CY_CAPSENSE_CSD_SS_HWTH_EN   (CY_CAPSENSE_CSD_SS_HW_EN | CY_CAPSENSE_CSD_SS_TH_EN)
	Full auto-tune is enabled.
#define	CY_CAPSENSE_MAX_SUPPORTED_FREQ_NUM   (3u)
	Number of multi-frequency scan channels.
#define	CY_CAPSENSE_CONFIGURED_FREQ_NUM   (3u)
	Total number of multi-frequency scan channels.
#define	CY_CAPSENSE_MFS_CH0_INDEX   (0u)
	Multi-frequency channel 0 constant.
#define	CY_CAPSENSE_MFS_CH1_INDEX   (1u)
	Multi-frequency channel 1 constant.
#define	CY_CAPSENSE_MFS_CH2_INDEX   (2u)
	Multi-frequency channel 2 constant.
#define	CY_CAPSENSE_MFS_FREQ_CHANNELS_NUM_MASK   (0xFu)
	Multi-frequency channel number mask.
#define	CY_CAPSENSE_MFS_EN_MASK   (0x10u)
	Multi-frequency enable mask.
#define	CY_CAPSENSE_MFS_WIDGET_FREQ_ALL_CH_POS   (0x05u)
	Multi-frequency channels position.
#define	CY_CAPSENSE_MFS_WIDGET_FREQ_ALL_CH_MASK   (0x60u)
	Multi-frequency channels mask.
#define	CY_CAPSENSE_MFS_WIDGET_FREQ_CH_1_MASK   (0x20u)
	Multi-frequency channel 1 mask.
#define	CY_CAPSENSE_MFS_WIDGET_FREQ_CH_2_MASK   (0x40u)
	Multi-frequency channel 2 mask.
#define	CY_CAPSENSE_SNS_CONNECTION_UNDEFINED   (0u)
	Inactive sensor connection undefined.
#define	CY_CAPSENSE_SNS_CONNECTION_GROUND   (1u)
	Inactive sensor connection to ground.
#define	CY_CAPSENSE_SNS_CONNECTION_HIGHZ   (2u)
	Inactive sensor connection to High-Z.
#define	CY_CAPSENSE_SNS_CONNECTION_SHIELD   (4u)
	Inactive sensor connection to shield.
#define	CY_CAPSENSE_SNS_CONNECTION_VDDA_BY_2   (5u)
	Inactive CSX sensor connection to VDDA/2 voltage driven bus. More...
#define	CY_CAPSENSE_SH_DELAY_0NS   (0u)
	No shield signal delay.
#define	CY_CAPSENSE_SH_DELAY_5NS   (1u)
	Shield signal delay > 5 ns.
#define	CY_CAPSENSE_SH_DELAY_10NS   (2u)
	Shield signal delay > 10 ns.
#define	CY_CAPSENSE_SH_DELAY_20NS   (3u)
	Shield signal delay > 20 ns.
#define	CY_CAPSENSE_IDAC_SOURCING   (0u)
	Idac sourcing.
#define	CY_CAPSENSE_IDAC_SINKING   (1u)
	Idac sinking.
#define	CY_CAPSENSE_CSH_PRECHARGE_VREF   (0u)
	Shield tank capacitor pre-charge from Vref.
#define	CY_CAPSENSE_CSH_PRECHARGE_IO_BUF   (1u)
	Shield tank capacitor pre-charge from IO buffer.
#define	CY_CAPSENSE_CIC_AUTO_MASK   (0x80u)
	Auto-mode of CIC2 Shift mask.
#define	CY_CAPSENSE_CIC_FIELD_POSITION   (28u)
	CIC2 Shift field position in register.
#define	CY_CAPSENSE_CLK_SOURCE_AUTO_MASK   (0x80u)
	Auto-mode of clock source selection mask.
#define	CY_CAPSENSE_CLK_SOURCE_MASK   (0x0Fu)
	Clock source selection mask.
#define	CY_CAPSENSE_CLK_SOURCE_DIRECT   (0x00u)
	Clock source direct.
#define	CY_CAPSENSE_CLK_SOURCE_SSC6   (0x01u)
	Clock source SSC6.
#define	CY_CAPSENSE_CLK_SOURCE_SSC7   (0x02u)
	Clock source SSC7.
#define	CY_CAPSENSE_CLK_SOURCE_SSC9   (0x03u)
	Clock source SSC9.
#define	CY_CAPSENSE_CLK_SOURCE_SSC10   (0x04u)
	Clock source SSC10.
#define	CY_CAPSENSE_CLK_SOURCE_PRS8   (0x05u)
	Clock source PRS8.
#define	CY_CAPSENSE_CLK_SOURCE_PRS12   (0x06u)
	Clock source PRS12.
#define	CY_CAPSENSE_CLK_SOURCE_SMARTSENSE_MASK   (0xF0u)
	Smart sensing algorithm Clock Source reserved bits.
#define	CY_CAPSENSE_CLK_SOURCE_SMARTSENSE_POS   (4u)
	Smart sensing algorithm Clock Source reserved bits position.
#define	CY_CAPSENSE_CLK_SOURCE_SSC   (0x01u)
	Clock source SSC.
#define	CY_CAPSENSE_CLK_SOURCE_PRS   (0x02u)
	Clock source PRS.
#define	CY_CAPSENSE_CLK_SOURCE_SSC_AUTO_MASK   (0x04u)
	Clock source SSC auto-selection mask.
#define	CY_CAPSENSE_CLK_SOURCE_SSC_AUTO   (CY_CAPSENSE_CLK_SOURCE_SSC_AUTO_MASK)
	Clock source SSC auto-selection.
#define	CY_CAPSENSE_CLK_SOURCE_PRS_AUTO_MASK   (0x08u)
	Clock source PRS auto-selection mask.
#define	CY_CAPSENSE_CLK_SOURCE_PRS_AUTO   (CY_CAPSENSE_CLK_SOURCE_PRS_AUTO_MASK)
	Clock source PRS auto-selection.
#define	CY_CAPSENSE_LFSR_BITS_AUTO_MASK   (0x80u)
	LFSR range auto-selection mask.
#define	CY_CAPSENSE_LFSR_BITS_RANGE_MASK   (0x03u)
	LFSR range mask.
#define	CY_CAPSENSE_LFSR_BITS_AUTO   (CY_CAPSENSE_LFSR_BITS_AUTO_MASK)
	LFSR range auto-selection.
#define	CY_CAPSENSE_LFSR_BITS_RANGE_0   (0x00u)
	LFSR range for LFSR_BITS=0.
#define	CY_CAPSENSE_LFSR_BITS_RANGE_1   (0x01u)
	LFSR range for LFSR_BITS=1.
#define	CY_CAPSENSE_LFSR_BITS_RANGE_2   (0x02u)
	LFSR range for LFSR_BITS=2.
#define	CY_CAPSENSE_LFSR_BITS_RANGE_3   (0x03u)
	LFSR range for LFSR_BITS=3.
#define	CY_CAPSENSE_CIC_RATE_MODE_MANUAL   (0u)
	The cicRate value set by users.
#define	CY_CAPSENSE_CIC_RATE_MODE_AUTO   (1u)
	The cicRate value configured by middleware.
#define	CY_CAPSENSE_CIC_RATE_MODE_SMARTSENSE   (2u)
	The cicRate value configured by SMARTSENSE™ algorithm.
#define	CY_CAPSENSE_SNS_CLK_SOURCE_AUTO_SEL_MODE_STRONG   (0x00u)
	This mode implements checking the following rules: More...
#define	CY_CAPSENSE_SNS_CLK_SOURCE_AUTO_SEL_MODE_MEDIUM   (0x01u)
	This mode implements checking the following rules: More...
#define	CY_CAPSENSE_SNS_CLK_SOURCE_AUTO_SEL_MODE_WEAK   (0x02u)
	This mode implements checking the following rules: More...
#define	CY_CAPSENSE_INIT_SW_RES_LOW   (0x00u)
	Low switch resistance at initialization.
#define	CY_CAPSENSE_INIT_SW_RES_MEDIUM   (0x01u)
	Medium switch resistance at initialization.
#define	CY_CAPSENSE_INIT_SW_RES_HIGH   (0x02u)
	High switch resistance at initialization.
#define	CY_CAPSENSE_SCAN_SW_RES_LOW   (0x00u)
	Low switch resistance at scanning.
#define	CY_CAPSENSE_SCAN_SW_RES_MEDIUM   (0x01u)
	Medium switch resistance at scanning.
#define	CY_CAPSENSE_SCAN_SW_RES_HIGH   (0x02u)
	High switch resistance at scanning.
#define	CY_CAPSENSE_SHIELD_SW_RES_LOW   (0x00u)
	Low shield switch resistance.
#define	CY_CAPSENSE_SHIELD_SW_RES_MEDIUM   (0x01u)
	Medium shield switch resistance.
#define	CY_CAPSENSE_SHIELD_SW_RES_HIGH   (0x02u)
	High shield switch resistance.
#define	CY_CAPSENSE_SHIELD_SW_RES_LOW_EMI   (0x03u)
	Low-EMI shield switch resistance.
#define	CY_CAPSENSE_SHIELD_DISABLED   (0u)
	Shield disabled.
#define	CY_CAPSENSE_SHIELD_ACTIVE   (1u)
	Active shield mode.
#define	CY_CAPSENSE_SHIELD_PASSIVE   (2u)
	Passive shield mode.
#define	CY_CAPSENSE_VREF_SRSS   (0x00u)
	Vref source is taken from SRSS.
#define	CY_CAPSENSE_VREF_PASS   (0x01u)
	Vref source is taken from PASS.
#define	CY_CAPSENSE_IREF_SRSS   (0x00u)
	Iref source is taken from SRSS.
#define	CY_CAPSENSE_IREF_PASS   (0x01u)
	Iref source is taken from PASS.
#define	CY_CAPSENSE_LOW_VOLTAGE_LIMIT   (2000u)
	Voltage limit to switch to low-voltage configuration.
#define	CY_CAPSENSE_POSITION_FILTERS_MASK   (0x000000FFu)
	Mask of all filters enabling.
#define	CY_CAPSENSE_POSITION_MED_MASK   (0x00000001u)
	Median position filter enable mask.
#define	CY_CAPSENSE_POSITION_IIR_MASK   (0x00000002u)
	IIR position filter enable mask.
#define	CY_CAPSENSE_POSITION_AIIR_MASK   (0x00000004u)
	Adaptive IIR position filter enable mask.
#define	CY_CAPSENSE_POSITION_AVG_MASK   (0x00000008u)
	Average position filter enable mask.
#define	CY_CAPSENSE_POSITION_JIT_MASK   (0x00000010u)
	Jitter position filter enable mask.
#define	CY_CAPSENSE_POSITION_FILTERS_SIZE_MASK   (0x0000FF00u)
	Mask of position filters history size.
#define	CY_CAPSENSE_POSITION_FILTERS_SIZE_OFFSET   (8u)
	Offset of position filters history size.
#define	CY_CAPSENSE_POSITION_IIR_COEFF_MASK   (0x00FF0000u)
	Mask of IIR coefficient of position filter.
#define	CY_CAPSENSE_POSITION_IIR_COEFF_OFFSET   (16u)
	Offset of IIR coefficient of position filter.
#define	CY_CAPSENSE_RC_FILTER_SNS_HISTORY_SIZE_OFFSET   (0u)
	Offset of raw count filter history size.
#define	CY_CAPSENSE_RC_FILTER_MEDIAN_EN_OFFSET   (4u)
	Offset of raw count median filter enable mask.
#define	CY_CAPSENSE_RC_FILTER_MEDIAN_MODE_OFFSET   (5u)
	Offset of raw count median filter mode mask.
#define	CY_CAPSENSE_RC_FILTER_IIR_EN_OFFSET   (7u)
	Offset of raw count IIR filter enable mask.
#define	CY_CAPSENSE_RC_FILTER_IIR_MODE_OFFSET   (8u)
	Offset of raw count IIR filter mode mask.
#define	CY_CAPSENSE_RC_FILTER_AVERAGE_EN_OFFSET   (10u)
	Offset of raw count average filter enable mask.
#define	CY_CAPSENSE_RC_FILTER_AVERAGE_MODE_OFFSET   (11u)
	Offset of raw count average filter mode mask.
#define	CY_CAPSENSE_RC_HW_IIR_FILTER_EN_OFFSET   (13u)
	Offset of raw count HW IIR filter enable mask.
#define	CY_CAPSENSE_RC_FILTER_SNS_HISTORY_SIZE_MASK   ((uint16_t)((uint16_t)0x000Fu << CY_CAPSENSE_RC_FILTER_SNS_HISTORY_SIZE_OFFSET))
	Mask of raw count filter history size.
#define	CY_CAPSENSE_RC_FILTER_MEDIAN_EN_MASK   ((uint16_t)((uint16_t)0x0001u << CY_CAPSENSE_RC_FILTER_MEDIAN_EN_OFFSET))
	Median raw count filter enable mask.
#define	CY_CAPSENSE_RC_FILTER_MEDIAN_MODE_MASK   ((uint16_t)((uint16_t)0x0003u << CY_CAPSENSE_RC_FILTER_MEDIAN_MODE_OFFSET))
	Median raw count filter mode mask.
#define	CY_CAPSENSE_RC_FILTER_IIR_EN_MASK   ((uint16_t)((uint16_t)0x0001u << CY_CAPSENSE_RC_FILTER_IIR_EN_OFFSET))
	IIR raw count filter enable mask.
#define	CY_CAPSENSE_RC_FILTER_IIR_MODE_MASK   ((uint16_t)((uint16_t)0x0003u << CY_CAPSENSE_RC_FILTER_IIR_MODE_OFFSET))
	IIR raw count filter mode mask.
#define	CY_CAPSENSE_RC_FILTER_AVERAGE_EN_MASK   ((uint16_t)((uint16_t)0x0001u << CY_CAPSENSE_RC_FILTER_AVERAGE_EN_OFFSET))
	Average raw count filter enable mask.
#define	CY_CAPSENSE_RC_FILTER_AVERAGE_MODE_MASK   ((uint16_t)((uint16_t)0x0003u << CY_CAPSENSE_RC_FILTER_AVERAGE_MODE_OFFSET))
	Average raw count filter mode mask.
#define	CY_CAPSENSE_RC_HW_IIR_FILTER_EN_MASK   ((uint16_t)((uint16_t)0x0001u << CY_CAPSENSE_RC_HW_IIR_FILTER_EN_OFFSET))
	Raw count HW IIR filter enable mask.
#define	CY_CAPSENSE_RC_FILTER_ALL_EN_MASK
	All raw count filters enable mask. More...
#define	CY_CAPSENSE_IIR_FILTER_STANDARD   ((uint16_t)((uint16_t)1u << CY_CAPSENSE_RC_FILTER_IIR_MODE_OFFSET))
	Raw count IIR filter mode standard.
#define	CY_CAPSENSE_IIR_FILTER_PERFORMANCE   ((uint16_t)((uint16_t)2u << CY_CAPSENSE_RC_FILTER_IIR_MODE_OFFSET))
	Raw count IIR filter mode performance.
#define	CY_CAPSENSE_AVERAGE_FILTER_LEN_4   ((uint16_t)((uint16_t)2u << CY_CAPSENSE_RC_FILTER_AVERAGE_MODE_OFFSET))
	Raw count average filter mode.

Macro Definition Documentation

CY_CAPSENSE_SNS_CONNECTION_VDDA_BY_2

#define CY_CAPSENSE_SNS_CONNECTION_VDDA_BY_2   (5u)

Inactive CSX sensor connection to VDDA/2 voltage driven bus.

Note

This field is available only for the fifth-generation CAPSENSE™.

CY_CAPSENSE_SNS_CLK_SOURCE_AUTO_SEL_MODE_STRONG

#define CY_CAPSENSE_SNS_CLK_SOURCE_AUTO_SEL_MODE_STRONG   (0x00u)

This mode implements checking the following rules:

• An LFSR value should be selected so that the max clock dither is limited with the value, specified by the LFSR Dither Limit parameter.
• At least one full spread spectrum polynomial should pass during the scan time.
• The value of the number of conversions should be an integer multiple of the repeat period of the polynomial, that is specified by the Sense Clock LFSR Polynomial parameter.

CY_CAPSENSE_SNS_CLK_SOURCE_AUTO_SEL_MODE_MEDIUM

#define CY_CAPSENSE_SNS_CLK_SOURCE_AUTO_SEL_MODE_MEDIUM   (0x01u)

This mode implements checking the following rules:

• An LFSR value should be selected so that the max clock dither is limited with the value, specified by the LFSR Dither Limit parameter.
• At least one full spread spectrum polynomial should pass during the scan time.

CY_CAPSENSE_SNS_CLK_SOURCE_AUTO_SEL_MODE_WEAK

#define CY_CAPSENSE_SNS_CLK_SOURCE_AUTO_SEL_MODE_WEAK   (0x02u)

This mode implements checking the following rules:

• An LFSR value should be selected so that the max clock dither is limited with the value, specified by the LFSR Dither Limit parameter.

CY_CAPSENSE_RC_FILTER_ALL_EN_MASK

#define CY_CAPSENSE_RC_FILTER_ALL_EN_MASK

Value:

(CY_CAPSENSE_RC_FILTER_MEDIAN_EN_MASK |\
                                                         CY_CAPSENSE_RC_FILTER_IIR_EN_MASK |\
                                                         CY_CAPSENSE_RC_FILTER_AVERAGE_EN_OFFSET)

All raw count filters enable mask.