Defines an SPI driver to facilitate communication with other devices on an SPI bus (such as a temperature sensor, etc). More...

Typedefs
typedef enum WICED_SPI_MODE	WICED_SPI_MODE
	Clock polarity and phase If CPOL=0, base value of the clock is zero If CPOL=1, base value of the clock is one If CPHA=0, sample on leading (first) clock edge If CPHA=1, sample on trailing (second) clock edge.

typedef enum WICED_SPI_SS_POLARITY	WICED_SPI_SS_POLARITY
	Slave select polarity (output from master)

typedef enum WICED_SPI_ENDIAN	WICED_SPI_ENDIAN
	SPI Endian: Direction of bit data flow (MSB or LSB first).

typedef enum WICED_SPI_SS_MODE	WICED_SPI_SS_MODE
	For all the available GPIO config combinations (spiGpioCfg) for master and slave modes, please reference the Kit Guide or HW User Manual for your device, since the values vary by hardware platform. More...

Enumerations
enum	spi_interface_t { SPI1 = 0, SPI2 }
	Type Definitions. More...

enum	{ SPI_MASTER = 1, SPI_SLAVE = 2 }
	SPI Device Role. More...

enum	WICED_SPI_MODE { WICED_SPI_MODE_0, WICED_SPI_MODE_1, WICED_SPI_MODE_2, WICED_SPI_MODE_3 }
	Clock polarity and phase If CPOL=0, base value of the clock is zero If CPOL=1, base value of the clock is one If CPHA=0, sample on leading (first) clock edge If CPHA=1, sample on trailing (second) clock edge. More...

enum	WICED_SPI_SS_POLARITY { WICED_SPI_SS_ACTIVE_LOW, WICED_SPI_SS_ACTIVE_HIGH }
	Slave select polarity (output from master) More...

enum	WICED_SPI_ENDIAN { WICED_SPI_MSB_FIRST, WICED_SPI_LSB_FIRST }
	SPI Endian: Direction of bit data flow (MSB or LSB first). More...

enum	WICED_SPI_SS_MODE { WICED_SPI_SS_NORMAL, WICED_SPI_SS_INACTIVE_BTW_BYTES }
	For all the available GPIO config combinations (spiGpioCfg) for master and slave modes, please reference the Kit Guide or HW User Manual for your device, since the values vary by hardware platform. More...

enum	{ WICED_INPUT_PIN_PULL_UP = 0x0400, WICED_INPUT_PIN_PULL_DOWN = 0x0200, WICED_INPUT_PIN_FLOATING = 0x0 }

enum	WICED_SPIFFY_STATUS { WICED_SPIFFY_SUCCESS, WICED_SPIFFY_FAIL, WICED_SPIFFY_SLAVE_NOT_ENOUGH_RX_FIFO_BYTES }

Functions
void	wiced_hal_pspi_init (spi_interface_t spi, uint32_t clkSpeed, WICED_SPI_ENDIAN endian, WICED_SPI_SS_POLARITY polarity, WICED_SPI_MODE mode)
	Initialize the SPI driver with the given parameters. More...

void	wiced_hal_pspi_tx_data (spi_interface_t spi, uint32_t txLen, const uint8_t *txBuf)
	Send/transmit data over SPI as the master. More...

void	wiced_hal_pspi_rx_data (spi_interface_t spi, uint32_t rxLen, uint8_t *rxBuf)
	Receive data over SPI as the master. More...

void	wiced_hal_pspi_reset (spi_interface_t spi)
	Reset and bring the SPI driver to a known good state with default configuration. More...

void	wiced_hal_pspi_exchange_data (spi_interface_t spi, uint32_t len, const uint8_t txBuf, uint8_t rxBuf)
	Transmit one buffer of data while simultaneously receiving data (as the master). More...

void	wiced_hal_pspi_slave_enable_tx (spi_interface_t spi)
	Enable the tx fifo so any data in it will be transmitted when the SPI master clocks it out. More...

void	wiced_hal_pspi_slave_disable_tx (spi_interface_t spi)
	Disable the tx fifo. More...

void	wiced_hal_pspi_slave_enable_rx (spi_interface_t spi)
	Enable the rx fifo for incoming data when the SPI master clocks it in. More...

void	wiced_hal_pspi_slave_disable_rx (spi_interface_t spi)
	Disable the rx fifo. More...

void	wiced_hal_pspi_slave_tx_data (spi_interface_t spi, uint32_t txLen, const uint8_t *txBuf)
	Send/transmit data over SPI as a slave. More...

WICED_SPIFFY_STATUS	wiced_hal_pspi_slave_rx_data (spi_interface_t spi, uint32_t rxLen, uint8_t *rxBuf)
	Receive data over SPI as a slave. More...

uint32_t	wiced_hal_pspi_slave_get_tx_fifo_count (spi_interface_t spi)
	Get the number of bytes in the slave tx fifo. More...

uint32_t	wiced_hal_pspi_slave_get_rx_fifo_count (spi_interface_t spi)
	Get the number of bytes in the slave rx fifo. More...

void	wiced_hal_pspi_clear_rx_fifo (spi_interface_t spi)
	clear the rx fifo. More...

Detailed Description

Defines an SPI driver to facilitate communication with other devices on an SPI bus (such as a temperature sensor, etc).

The driver is capable of assuming either a master or a slave role on said bus. Applications use this driver to obtain the status from and control the behavior of the SPI hardware. This driver only offers services for clock control, mode control and data transfer operations. The application is responsible for generating the slave/chip select signals (if it's in a master role). This could be done by mapping a GPIO pin for each slave the application wants to control (See wiced_hal_gpio.h for more information on driving a GPIO pin).

All master data transfer operations (half/full duplex) provided by this driver assume that the desired slave has already been selected and will remain selected throughout the duration of the transaction.

Please note that this driver cannot access supplied off-chip memory (if installed; serial flash, etc). Please use the drivers found in wiced_hal_sflash.h or wiced_hal_seeprom.h to access those modules, as those drivers deal with a separate SPI bus and include checks to ensure safe data handling operations. This driver is intended only to interface with other devices on the peripheral SPI bus, such as a motion sensor. Of course, this restriction does not preclude the user from adding their own memory module to the peripheral bus, and using this driver with it.

Typedef Documentation

typedef enum WICED_SPI_SS_MODE WICED_SPI_SS_MODE

For all the available GPIO config combinations (spiGpioCfg) for master and slave modes, please reference the Kit Guide or HW User Manual for your device, since the values vary by hardware platform.

Slave Select mode (output from master)

Enumeration Type Documentation

anonymous enum

SPI Device Role.

Enumerator
SPI_MASTER	SPI Device in the Master role.
SPI_SLAVE	SPI Device in the Slave role.

enum spi_interface_t

Type Definitions.

SPI Interfaces

Enumerator
SPI1	SPI1 Interface.
SPI2	SPI2 Interface.

enum WICED_SPI_ENDIAN

SPI Endian: Direction of bit data flow (MSB or LSB first).

Enumerator
WICED_SPI_MSB_FIRST	Transmit most significant bit first.
WICED_SPI_LSB_FIRST	Transmit least significant bit first.

enum WICED_SPI_MODE

Clock polarity and phase If CPOL=0, base value of the clock is zero If CPOL=1, base value of the clock is one If CPHA=0, sample on leading (first) clock edge If CPHA=1, sample on trailing (second) clock edge.

Enumerator
WICED_SPI_MODE_0	CPOL = 0, CPHA = 0 Data read on clock's rising edge, data changed on a falling edge.
WICED_SPI_MODE_1	CPOL = 0, CPHA = 1 Data read on clock's falling edge, data changed on a rising edge.
WICED_SPI_MODE_2	CPOL = 1, CPHA = 0 Data read on clock's falling edge, data changed on a rising edge.
WICED_SPI_MODE_3	CPOL = 1, CPHA = 1 Data read on clock's rising edge, data changed on a falling edge.

enum WICED_SPI_SS_MODE

For all the available GPIO config combinations (spiGpioCfg) for master and slave modes, please reference the Kit Guide or HW User Manual for your device, since the values vary by hardware platform.

Slave Select mode (output from master)

Enumerator
WICED_SPI_SS_NORMAL	Slave select normal.
WICED_SPI_SS_INACTIVE_BTW_BYTES	Slave select goes inactive between bytes.

enum WICED_SPI_SS_POLARITY

Slave select polarity (output from master)

Enumerator
WICED_SPI_SS_ACTIVE_LOW	Slave select active low.
WICED_SPI_SS_ACTIVE_HIGH	Slave select active high.

Function Documentation

void wiced_hal_pspi_clear_rx_fifo ( spi_interface_t spi )

clear the rx fifo.

Parameters

spi	- SPI interface.( SPI1 or SPI2 ).

Returns: none

void wiced_hal_pspi_exchange_data	(	spi_interface_t	spi,
		uint32_t	len,
		const uint8_t *	txBuf,
		uint8_t *	rxBuf
	)

Transmit one buffer of data while simultaneously receiving data (as the master).

Assumes that the slave/chip select line will be active throughout this transaction.

Parameters

spi	- SPI interface.( SPI1 or SPI2 ).
len	- The number of bytes to transmit and receive.
txBuf	- Pointer to the data buffer to transmit.
rxBuf	- Pointer to the buffer where the read data will be stored.

Returns: none

void wiced_hal_pspi_init	(	spi_interface_t	spi,
		uint32_t	clkSpeed,
		WICED_SPI_ENDIAN	endian,
		WICED_SPI_SS_POLARITY	polarity,
		WICED_SPI_MODE	mode
	)

Initialize the SPI driver with the given parameters.

Please reference the various parameters above.

In this function, the hardware block will be reset. The driver will be configured before the first transaction with a device.

Please note that the SPI pin selection must be done using Supermux array (wiced_platform_pin_config.c).

Parameters

spi	- SPI interface.( SPI1 or SPI2 ).
clkSpeed	- Clock speed (non-zero for master, zero for slave).
endian	- Direction of bit data flow (MSB or LSB first).
polarity	- Active high or active low for chip select line.
mode,-	SPI mode (0-3).

Returns: none

void wiced_hal_pspi_reset ( spi_interface_t spi )

Reset and bring the SPI driver to a known good state with default configuration.

Note that the hardware block will be reset.

Parameters

spi	- SPI interface.( SPI1 or SPI2 ).

Returns: none

void wiced_hal_pspi_rx_data	(	spi_interface_t	spi,
		uint32_t	rxLen,
		uint8_t *	rxBuf
	)

Receive data over SPI as the master.

Assumes that the slave/chip select line will be active throughout the transaction.

Parameters

spi	- SPI interface.( SPI1 or SPI2 ).
txLen	- Length of the data buffer to receive.
txBuf	- Pointer to the data buffer which will receive data.

Returns: none

void wiced_hal_pspi_slave_disable_rx ( spi_interface_t spi )

Disable the rx fifo.

Parameters

spi	- SPI interface.( SPI1 or SPI2 ).

Returns: none

void wiced_hal_pspi_slave_disable_tx ( spi_interface_t spi )

Disable the tx fifo.

Parameters

spi	- SPI interface.( SPI1 or SPI2 ).

Returns: none

void wiced_hal_pspi_slave_enable_rx ( spi_interface_t spi )

Enable the rx fifo for incoming data when the SPI master clocks it in.

Parameters

spi	- SPI interface.( SPI1 or SPI2 ).

Returns: none

void wiced_hal_pspi_slave_enable_tx ( spi_interface_t spi )

Enable the tx fifo so any data in it will be transmitted when the SPI master clocks it out.

Parameters

spi	- SPI interface.( SPI1 or SPI2 ).

Returns: none

uint32_t wiced_hal_pspi_slave_get_rx_fifo_count ( spi_interface_t spi )

Get the number of bytes in the slave rx fifo.

Parameters

spi	- SPI interface.( SPI1 or SPI2 ).

Returns: Number of bytes in the rx fifo.

uint32_t wiced_hal_pspi_slave_get_tx_fifo_count ( spi_interface_t spi )

Get the number of bytes in the slave tx fifo.

Parameters

spi	- SPI interface.( SPI1 or SPI2 ).

Returns: Number of bytes in the tx fifo.

WICED_SPIFFY_STATUS wiced_hal_pspi_slave_rx_data	(	spi_interface_t	spi,
		uint32_t	rxLen,
		uint8_t *	rxBuf
	)

Receive data over SPI as a slave.

If the rx fifo is enabled, pull data from the rx fifo if there are at least rxLen bytes in the rx fifo.

Parameters

spi	- SPI interface.( SPI1 or SPI2 ).
txLen	- Length of the data buffer to receive.
txBuf	- Pointer to the data buffer which will receive data.

Returns: SUCCESS if bytes were received or NOT_ENOUGH_RX_FIFO_BYTES if fail.

void wiced_hal_pspi_slave_tx_data	(	spi_interface_t	spi,
		uint32_t	txLen,
		const uint8_t *	txBuf
	)

Send/transmit data over SPI as a slave.

If the tx fifo is enabled, the data in the tx fifo will be transmitted when the SPI master clocks it out.

Parameters

spi	- SPI interface.( SPI1 or SPI2 ).
txLen	- The number of bytes-to-send that this buffer contains.
txBuf	- Pointer to the data buffer to transmit.

Returns: none

void wiced_hal_pspi_tx_data	(	spi_interface_t	spi,
		uint32_t	txLen,
		const uint8_t *	txBuf
	)

Send/transmit data over SPI as the master.

Assumes that the slave/chip select line will be active throughout the transaction.

Parameters

spi	- SPI interface.( SPI1 or SPI2 ).
txLen	- The number of bytes-to-send that this buffer contains.
txBuf	- Pointer to the data buffer to transmit.

Returns: none


			AIROC^™ BTSDK v4.4 - Documentation

Typedefs

Enumerations

Functions

Detailed Description

Typedef Documentation

Enumeration Type Documentation

Function Documentation