Defines a driver to facilitate interfacing with the GPIO pins. More...

Macros
#define	WICED_GPIO_ACTIVE_HIGH 1

#define	WICED_GPIO_ACTIVE_LOW 0

Typedefs
typedef enum WICED_GPIO_STATUS_e	wiced_bt_gpio_select_status_t
	Possible return values from wiced_hal_gpio_select_function(...), Callers only need to check for the GPIO_FAILURE case since any other status means success.

Enumerations
enum	WICED_GPIO_PIN_OUTPUT_CONFIG { WICED_GPIO_PIN_OUTPUT_LOW, WICED_GPIO_PIN_OUTPUT_HIGH }
	Pin output config.

enum	GPIO_PIN_OUTPUT_CONFIG { GPIO_PIN_OUTPUT_LOW, GPIO_PIN_OUTPUT_HIGH }

enum	{ WICED_GPIO_EDGE_TRIGGER_MASK = 0x0001, WICED_GPIO_EDGE_TRIGGER = 0x0001, WICED_GPIO_LEVEL_TRIGGER = 0x0000, WICED_GPIO_TRIGGER_POLARITY_MASK = 0x0002, WICED_GPIO_TRIGGER_NEG = 0x0002, WICED_GPIO_DUAL_EDGE_TRIGGER_MASK = 0x0004, WICED_GPIO_EDGE_TRIGGER_BOTH = 0x0004, WICED_GPIO_EDGE_TRIGGER_SINGLE = 0x0000, WICED_GPIO_INTERRUPT_ENABLE_MASK = 0x0008, WICED_GPIO_INTERRUPT_ENABLE = 0x0008, WICED_GPIO_INTERRUPT_DISABLE = 0x0000, GPIO_INTERRUPT_DISABLE = 0x0000, WICED_GPIO_EN_INT_MASK = WICED_GPIO_EDGE_TRIGGER_MASK \| WICED_GPIO_TRIGGER_POLARITY_MASK \| WICED_GPIO_DUAL_EDGE_TRIGGER_MASK \| WICED_GPIO_INTERRUPT_ENABLE_MASK, WICED_GPIO_EN_INT_LEVEL_HIGH = WICED_GPIO_INTERRUPT_ENABLE \| WICED_GPIO_LEVEL_TRIGGER, WICED_GPIO_EN_INT_LEVEL_LOW = WICED_GPIO_INTERRUPT_ENABLE \| WICED_GPIO_LEVEL_TRIGGER \| WICED_GPIO_TRIGGER_NEG, WICED_GPIO_EN_INT_RISING_EDGE = WICED_GPIO_INTERRUPT_ENABLE \| WICED_GPIO_EDGE_TRIGGER, WICED_GPIO_EN_INT_FALLING_EDGE = WICED_GPIO_INTERRUPT_ENABLE \| WICED_GPIO_EDGE_TRIGGER \| WICED_GPIO_TRIGGER_NEG, WICED_GPIO_EN_INT_BOTH_EDGE = WICED_GPIO_INTERRUPT_ENABLE \| WICED_GPIO_EDGE_TRIGGER \| WICED_GPIO_EDGE_TRIGGER_BOTH, GPIO_EN_INT_LEVEL_HIGH = WICED_GPIO_INTERRUPT_ENABLE \| WICED_GPIO_LEVEL_TRIGGER, GPIO_EN_INT_LEVEL_LOW = WICED_GPIO_INTERRUPT_ENABLE \| WICED_GPIO_LEVEL_TRIGGER \| WICED_GPIO_TRIGGER_NEG, GPIO_EN_INT_RISING_EDGE = WICED_GPIO_INTERRUPT_ENABLE \| WICED_GPIO_EDGE_TRIGGER, GPIO_EN_INT_FALLING_EDGE = WICED_GPIO_INTERRUPT_ENABLE \| WICED_GPIO_EDGE_TRIGGER \| WICED_GPIO_TRIGGER_NEG, GPIO_EN_INT_BOTH_EDGE = WICED_GPIO_INTERRUPT_ENABLE \| WICED_GPIO_EDGE_TRIGGER \| WICED_GPIO_EDGE_TRIGGER_BOTH, WICED_GPIO_INPUT_ENABLE = 0x0000, WICED_GPIO_OUTPUT_DISABLE = 0x0000, WICED_GPIO_OUTPUT_ENABLE = 0x4000, WICED_GPIO_KS_OUTPUT_ENABLE = 0x0001, WICED_GPIO_OUTPUT_FN_SEL_MASK = 0x0000, WICED_GPIO_OUTPUT_FN_SEL_SHIFT = 0, GPIO_INPUT_ENABLE = 0x0000, GPIO_OUTPUT_DISABLE = 0x0000, GPIO_OUTPUT_ENABLE = 0x4000, GPIO_KS_OUTPUT_ENABLE = 0x0001, GPIO_OUTPUT_FN_SEL_MASK = 0x0000, GPIO_OUTPUT_FN_SEL_SHIFT = 0, WICED_GPIO_GLOBAL_INPUT_ENABLE = 0x0000, WICED_GPIO_GLOBAL_INPUT_DISABLE = 0x0040, WICED_GPIO_PULL_UP_DOWN_NONE = 0x0000, WICED_GPIO_PULL_UP = 0x0400, WICED_GPIO_PULL_DOWN = 0x0200, WICED_GPIO_INPUT_DISABLE = 0x0600, GPIO_PULL_UP_DOWN_NONE = 0x0000, GPIO_PULL_UP = 0x0400, GPIO_PULL_DOWN = 0x0200, GPIO_INPUT_DISABLE = 0x0600, WICED_GPIO_DRIVE_SEL_MASK = 0x0800, WICED_GPIO_DRIVE_SEL_LOWEST = 0x0000, WICED_GPIO_DRIVE_SEL_MIDDLE_0 = 0x0000, WICED_GPIO_DRIVE_SEL_MIDDLE_1 = 0x0800, WICED_GPIO_DRIVE_SEL_HIGHEST = 0x0800, WICED_GPIO_HYSTERESIS_MASK = 0x2000, WICED_GPIO_HYSTERESIS_ON = 0x2000, WICED_GPIO_HYSTERESIS_OFF = 0x0000, WICED_GPIO_ARM_DRIVE_SEL_02MA = 0X40000000, WICED_GPIO_ARM_DRIVE_SEL_04MA = 0X40100000, WICED_GPIO_ARM_DRIVE_SEL_06MA = 0X40200000, WICED_GPIO_ARM_DRIVE_SEL_08MA = 0X40300000, WICED_GPIO_ARM_DRIVE_SEL_10MA = 0X40800000, WICED_GPIO_ARM_DRIVE_SEL_12MA = 0X40900000, WICED_GPIO_ARM_DRIVE_SEL_14MA = 0X40A00000, WICED_GPIO_ARM_DRIVE_SEL_16MA = 0X40B00000 }
	The following enum defines the constant values for the GPIO driver and associated GPIOs, each of which has a set of configuration signals. More...

enum	wiced_bt_gpio_numbers_t { WICED_P00 = 0, WICED_P01, WICED_P02, WICED_P03, WICED_P04, WICED_P05, WICED_P06, WICED_P07, WICED_P08, WICED_P09, WICED_P10, WICED_P11, WICED_P12, WICED_P13, WICED_P14, WICED_P15, WICED_P16, WICED_P17, WICED_P18, WICED_P19, WICED_P20, WICED_P21, WICED_P22, WICED_P23, WICED_P24, WICED_P25, WICED_P26, WICED_P27, WICED_P28, WICED_P29, WICED_P30, WICED_P31, WICED_P32, WICED_P33, WICED_P34, WICED_P35, WICED_P36, WICED_P37, WICED_P38, WICED_P39, WICED_GPIO_00, WICED_GPIO_01, WICED_GPIO_02, WICED_GPIO_03, WICED_GPIO_04, WICED_GPIO_05, WICED_GPIO_06, WICED_GPIO_07, WICED_GPIO_08, WICED_GPIO_09, WICED_GPIO_10, WICED_GPIO_11, WICED_GPIO_12, WICED_GPIO_13, WICED_GPIO_14, WICED_GPIO_15, WICED_GPIO_16, WICED_GPIO_17, WICED_GPIO_18, WICED_GPIO_19, WICED_GPIO_20, WICED_GPIO_21, WICED_GPIO_22, WICED_GPIO_23, WICED_WLAN_GPIO_00, WICED_WLAN_GPIO_01, WICED_WLAN_GPIO_02, WICED_WLAN_GPIO_03, WICED_WLAN_GPIO_04, WICED_WLAN_GPIO_05, WICED_WLAN_GPIO_06, WICED_WLAN_GPIO_07, WICED_WLAN_GPIO_08, WICED_WLAN_GPIO_09, WICED_WLAN_GPIO_10, WICED_WLAN_GPIO_11, WICED_WLAN_GPIO_12, WICED_WLAN_GPIO_13, WICED_WLAN_GPIO_14, WICED_WLAN_GPIO_15, MAX_NUM_OF_GPIO }

enum	wiced_bt_gpio_function_t { WICED_GPIO = 0, WICED_I2C_1_SCL, WICED_I2C_1_SDA, WICED_I2C_2_SCL, WICED_I2C_2_SDA, WICED_SPI_1_CLK, WICED_SPI_1_CS, WICED_SPI_1_MOSI, WICED_SPI_1_MISO, WICED_SPI_1_SLAVE_READY, WICED_SPI_1_IO2, WICED_SPI_1_IO3, WICED_SPI_1_INT, WICED_SPI_1_DCX, WICED_SPI_2_CLK, WICED_SPI_2_CS, WICED_SPI_2_MOSI, WICED_SPI_2_MISO, WICED_SPI_2_IO2, WICED_SPI_2_IO3, WICED_SPI_2_INT, WICED_SPI_2_DCX, WICED_SPI_3_CLK, WICED_SPI_3_CS, WICED_SPI_3_MOSI, WICED_SPI_3_MISO, WICED_SPI_3_INT, WICED_SWDCK, WICED_SWDIO, WICED_UART_1_TXD, WICED_UART_1_RXD, WICED_UART_1_CTS, WICED_UART_1_RTS, WICED_UART_2_TXD, WICED_UART_2_RXD, WICED_UART_2_CTS, WICED_UART_2_RTS, WICED_AOA_0, WICED_AOA_1, WICED_AOA_2, WICED_AOD_0, WICED_I2S_MASTER_CLK, WICED_I2S_MASTER_WS, WICED_I2S_MASTER_DO, WICED_I2S_MASTER_DI, WICED_I2S_SLAVE_CLK, WICED_I2S_SLAVE_WS, WICED_I2S_SLAVE_DO, WICED_I2S_SLAVE_DI, WICED_PCM_CLK, WICED_PCM_SYNC, WICED_PCM_OUT, WICED_PCM_IN, WICED_GCI_SECI_IN, WICED_GCI_SECI_OUT, BT_I2S_CLK_UART2_TXD = 11, BT_GPIO_4_I2C_SDA = 15, BT_GPIO_5_I2C_SCL = 15, BT_PCM_CLK_I2S_MCK = 5, BT_PCM_SYNC_I2S_MWS = 5, BT_I2S_DI_I2S_DI = 4, BT_I2S_DO_I2S_MDO = 5, WICED_ACLK_0, WICED_ACLK_1, WICED_KSO0, WICED_KSO1, WICED_KSO2, WICED_KSO3, WICED_KSO4, WICED_KSO5, WICED_KSO6, WICED_KSO7, WICED_KSO8, WICED_KSO9, WICED_KSO10, WICED_KSO11, WICED_KSO12, WICED_KSO13, WICED_KSO14, WICED_KSO15, WICED_KSO16, WICED_KSO17, WICED_KSO18, WICED_KSO19, WICED_TX_PD, WICED_TX_PD_TILDA, WICED_PA_RAMP, WICED_BT_GPIO_00, WICED_BT_GPIO_01, WICED_BT_GPIO_02, WICED_BT_GPIO_03, WICED_BT_GPIO_04, WICED_BT_GPIO_05, WICED_BT_GPIO_06, WICED_BT_GPIO_07, WICED_TX_FSM = 128, WICED_RX_FSM, WICED_RX_PU, WICED_ARM_GPIO_0, WICED_ARM_GPIO_1, WICED_ARM_GPIO_2, WICED_ARM_GPIO_3, WICED_ARM_GPIO_4, WICED_ARM_GPIO_5, WICED_ARM_GPIO_6, WICED_ARM_GPIO_7, WICED_ARM_A_GPIO_0, WICED_ARM_A_GPIO_1, WICED_ARM_A_GPIO_2, WICED_ARM_A_GPIO_3, WICED_ARM_A_GPIO_4, WICED_ARM_A_GPIO_5, WICED_ARM_A_GPIO_6, WICED_ARM_A_GPIO_7, WICED_ARM_PCM_IN, WICED_ARM_PCM_OUT, WICED_ARM_PCM_SYNC, WICED_ARM_PCM_CLK, WICED_ARM_SCB0_UART_RTS, WICED_ARM_SCB0_UART_CTS, WICED_ARM_SCB0_UART_RXD, WICED_ARM_SCB0_UART_TXD, WICED_ARM_SCB0_SPI_SELECT0, WICED_ARM_SCB0_SPI_SELECT1, WICED_ARM_SCB0_SPI_SELECT2, WICED_ARM_SCB0_SPI_SELECT3, WICED_ARM_SCB0_SPI_MOSI, WICED_ARM_SCB0_SPI_MISO, WICED_ARM_SCB0_SPI_CLK, WICED_ARM_SCB0_SCL, WICED_ARM_SCB0_SDA, WICED_ARM_SCB1_UART_RTS, WICED_ARM_SCB1_UART_CTS, WICED_ARM_SCB1_UART_RXD, WICED_ARM_SCB1_UART_TXD, WICED_ARM_SCB1_SPI_SELECT0, WICED_ARM_SCB1_SPI_SELECT1, WICED_ARM_SCB1_SPI_SELECT2, WICED_ARM_SCB1_SPI_SELECT3, WICED_ARM_SCB1_SPI_MOSI, WICED_ARM_SCB1_SPI_MISO, WICED_ARM_SCB1_SPI_CLK, WICED_ARM_SCB1_SCL, WICED_ARM_SCB1_SDA, WICED_ARM_TCPWM_TR_ALL_1, WICED_ARM_TCPWM_TR_ALL_2, WICED_ARM_TCPWM_TR_ALL_3, WICED_ARM_TCPWM_TR_ALL_4, WICED_ARM_TCPWM_OUT_11, WICED_ARM_TCPWM_OUT_12, WICED_ARM_TCPWM_OUT_21, WICED_ARM_TCPWM_OUT_22, WICED_ARM_I2S_MASTER_CLK, WICED_ARM_I2S_MASTER_WS, WICED_ARM_I2S_MASTER_DO, WICED_ARM_I2S_MASTER_DI, WICED_ARM_I2S_SLAVE_CLK, WICED_ARM_I2S_SLAVE_WS, WICED_ARM_I2S_SLAVE_DO, WICED_ARM_I2S_SLAVE_DI, WICED_ARM_DMIC_CK, WICED_ARM_DMIC_DQ, WICED_UNAVAILABLE = 0xFF }
	possible functions to be brought out through LHL GPIO's

enum	WICED_GPIO_STATUS_e { WICED_GPIO_FAILURE, WICED_GPIO_SUCCESS, WICED_GPIO_REMAPPED, WICED_GPIO_MOVED }
	Possible return values from wiced_hal_gpio_select_function(...), Callers only need to check for the GPIO_FAILURE case since any other status means success. More...

Functions
void	wiced_hal_gpio_init (void)
	Initializes the GPIO driver and its private values. More...

void	wiced_hal_gpio_configure_pin (uint32_t pin, uint32_t config, uint32_t outputVal)
	Configures a GPIO pin. More...

uint32_t	wiced_hal_gpio_get_pin_config (uint32_t pin)
	Retrieve the current configuration of the specified pin. More...

void	wiced_hal_gpio_set_pin_output (uint32_t pin, uint32_t val)
	Sets the output value of a pin. More...

uint32_t	wiced_hal_gpio_get_pin_output (uint32_t pin)
	Get the programmed output value of a pin. More...

uint32_t	wiced_hal_gpio_get_pin_input_status (uint32_t pin)
	Read the current value at a pin. More...

uint32_t	wiced_hal_gpio_get_pin_interrupt_status (uint32_t pin)
	Get the interrupt status of a pin. More...

void	wiced_hal_gpio_register_pin_for_interrupt (uint16_t pin, void(userfn)(void , uint8_t), void *userdata)
	Register a function for notification of changes to a pin (via interrupt). More...

uint32_t	wiced_hal_gpio_clear_pin_interrupt_status (uint32_t pin)
	Clear the interrupt status of a pin manually. More...

void	wiced_hal_gpio_disable_all_inputs (void)
	Configures all gpios to be INPUT DISABLED. More...

wiced_bool_t	wiced_hal_gpio_slimboot_reenforce_cfg (uint8_t pin, uint16_t config)
	save the LHL GPIO configuration in AON memeory to reenforce in slimboot This is a must if we want to wake up in SDS by external LHL GPIO interrupts More...

void	wiced_hal_gpio_lhl_set_pin_mode (uint32_t pin, uint32_t mode)
	In some cases we need to quickly change LHL pin IN/OUT modes. More...

wiced_bt_gpio_select_status_t	wiced_hal_gpio_select_function (wiced_bt_gpio_numbers_t pin, wiced_bt_gpio_function_t function)
	Configure a GPIO pin to have the chosen functionality. More...

Detailed Description

Defines a driver to facilitate interfacing with the GPIO pins.

Use this driver to control the behavior of any desired pin, such as driving a 1 or a 0, or as part of other drivers such as controlling the chip-select (CS) line for the SPI driver.

Macro Definition Documentation

#define WICED_GPIO_ACTIVE_HIGH 1

GPIO Active Level HIGH

#define WICED_GPIO_ACTIVE_LOW 0

GPIO Active Level LOW

Enumeration Type Documentation

anonymous enum

The following enum defines the constant values for the GPIO driver and associated GPIOs, each of which has a set of configuration signals.

Enumerator
WICED_GPIO_EDGE_TRIGGER_MASK	Trigger Type GPIO configuration bit 0, Interrupt type defines.
WICED_GPIO_TRIGGER_POLARITY_MASK	Negative Edge Triggering GPIO configuration bit 1, Interrupt polarity defines.
WICED_GPIO_DUAL_EDGE_TRIGGER_MASK	Dual Edge Triggering GPIO configuration bit 2, single/dual edge defines.
WICED_GPIO_INTERRUPT_ENABLE_MASK	Interrupt Enable GPIO configuration bit 3, interrupt enable/disable defines.
WICED_GPIO_EN_INT_MASK	Interrupt Config GPIO configuration bit 0:3, Summary of Interrupt enabling type.
WICED_GPIO_INPUT_ENABLE	GPIO Output Buffer Control and Output Value Multiplexing Control GPIO configuration bit 4:5, and 14 output enable control and muxing control.
GPIO_INPUT_ENABLE	Same as defines as above, but to avoids compilation errors with existing apps.
WICED_GPIO_GLOBAL_INPUT_ENABLE	Global Input Disable GPIO configuration bit 6, "Global_input_disable" Disable bit This bit when set to "1" , P0 input_disable signal will control ALL GPIOs. Default value (after power up or a reset event) is "0".
WICED_GPIO_PULL_UP_DOWN_NONE	Pull-up/Pull-down GPIO configuration bit 9 and bit 10, pull-up and pull-down enable Default value is [0,0]–means no pull resistor.
GPIO_PULL_UP_DOWN_NONE	Same as defines above, but avoid compilation issues with existing apps.
WICED_GPIO_DRIVE_SEL_MASK	Drive Strength (not for ARM gpio's) GPIO configuration bit 11.
WICED_GPIO_HYSTERESIS_MASK	Input Hysteresis GPIO configuration bit 13, hysteresis control.
WICED_GPIO_ARM_DRIVE_SEL_02MA	ARM GPIO Drive strength bit 23,21 and 20 30th bit, 1 to configure, 0 to default [16MA and 1.8V] Note: only for ARM gpios. Below config not applicable for LHL

enum WICED_GPIO_STATUS_e

Possible return values from wiced_hal_gpio_select_function(...), Callers only need to check for the GPIO_FAILURE case since any other status means success.

Enumerator
WICED_GPIO_FAILURE	The requested pin and function mapping is not supported by hardware.
WICED_GPIO_SUCCESS	The requested pin and function mapping is complete, The pin was previously not used and the function was previously not mapped.
WICED_GPIO_REMAPPED	The requested pin and function mapping is complete, The pin was previously used by another function, that function was disabled and the new function applied.
WICED_GPIO_MOVED	The requested pin and function mapping is complete, The requested function was already mapped to a different pin, that pin was disabled and the function moved to the new pin.

Function Documentation

uint32_t wiced_hal_gpio_clear_pin_interrupt_status ( uint32_t pin )

Clear the interrupt status of a pin manually.

Parameters

pin	- pin id (0-39).

Returns: Returns 1 if successful, 0xFF if the input parameters are out of range.

void wiced_hal_gpio_configure_pin	(	uint32_t	pin,
		uint32_t	config,
		uint32_t	outputVal
	)

Configures a GPIO pin.

Note that the GPIO output value is programmed before the GPIO is configured. This ensures that the GPIO will activate with the correct external value. Also note that the output value is always written to the output register regardless of whether the GPIO is configured as input or output.

Enabling interrupts here isn't sufficient; you also want to register with registerForMask().

All input parameter values must be in range or the function will have no effect.

Parameters

pin	- pin id (0-39).
config	- Gpio configuration. See Parameters section above for possible values.

For example, to enable interrupts for all edges, with a pull-down, you could use:

/// GPIO_EDGE_TRIGGER | GPIO_EDGE_TRIGGER_BOTH |
/// GPIO_INTERRUPT_ENABLE_MASK | GPIO_PULL_DOWN_MASK
///

\param outputVal - output value.

\return none

void wiced_hal_gpio_disable_all_inputs ( void )

Configures all gpios to be INPUT DISABLED.

Parameters

none

Returns: none

uint32_t wiced_hal_gpio_get_pin_config ( uint32_t pin )

Retrieve the current configuration of the specified pin.

All input parameter values must be in range or the function will have no effect.

Parameters

pin	- pin id (0-39).

Returns: Configuration of specified pin.

uint32_t wiced_hal_gpio_get_pin_input_status ( uint32_t pin )

Read the current value at a pin.

Note that for this to be valid, the pin must be configured with input enabled.

Parameters

pin	- pin id (0-39).

Returns: Returns 1 if the pin is high, 0 if the pin is low, and 0xFF if the input parameters are out of range.

uint32_t wiced_hal_gpio_get_pin_interrupt_status ( uint32_t pin )

Get the interrupt status of a pin.

Parameters

pin	- pin id (0-39).

Returns: Returns 1 if an interrupt (programmed edge) was detected at the pin, 0 if not. Returns 0xFF if the input parameters are out of range.

uint32_t wiced_hal_gpio_get_pin_output ( uint32_t pin )

Get the programmed output value of a pin.

Note that this does not return the current pin value. It returns the value that the pin would attempt to drive if it is configured as output.

Parameters

pin	- pin id (0-39).

Returns: Returns 1 if output port of the pin is configured 1, likewise for 0. Returns 0xFF if the input parameters are out of range.

void wiced_hal_gpio_init ( void )

Initializes the GPIO driver and its private values.

Also programs all GPIOs to be ready for use. This must be invoked before accessing any GPIO driver services, typically at boot. This is independent of other drivers and must be one of the first to be initialized.

Parameters

none

Returns: none

void wiced_hal_gpio_lhl_set_pin_mode	(	uint32_t	pin,
		uint32_t	mode
	)

In some cases we need to quickly change LHL pin IN/OUT modes.

Parameters

pin	- pin id (0-39)
mode	- Gpio configuration.

void wiced_hal_gpio_register_pin_for_interrupt	(	uint16_t	pin,
		void()(void , uint8_t)	userfn,
		void *	userdata
	)

Register a function for notification of changes to a pin (via interrupt).

Note that this is independent of configuring the pin for interrupts; a call to configurePin() is also required.

Also note that once registered, you CANNOT UNREGISTER; registration is meant to be a startup activity. To stop receiving notifications, re-configure the pin and disable the interrupt using configurePin().

Example:

/// void gpioIntTestCb(void *data);
///
/// uint16_t gpioIntMasks[GPIO_NUM_PORTS] = {0};
/// wiced_hal_gpio_configurePin(27,
///     (GPIO_INPUT_ENABLE|GPIO_PULL_DOWN|GPIO_EN_INT_RISING_EDGE),
///      GPIO_PIN_OUTPUT_LOW);
/// gpioIntMasks[pin2port(27)] |= (1<<pin2pin(27));
/// wiced_hal_gpio_registerPinForInterrupt(gpioIntMasks, gpioIntTestCb, NULL);
/// wiced_hal_gpio_clearPinInterruptStatus(27);
///

\param masks - Points to an array of NUM_PORTS.

\param userfn - Points to the function to call when the interrupt
comes .Below is the description of the arguments received by the call back.

    void* user_data  - User data provided when interrupt is being registered
                       using wiced_hal_gpio_register_pin_for_interrupt(...)

    uint8_t value    - Number of the pin causing the interrupt

(!) Note that the function does not need to clear the interrupt
status; this will be done automatically.

(!) Note that the function will be called ONCE per interrupt, not once per
pin (this makes a difference if multiple pins toggle at the same time).

\param userdata - Will be passed back to userfn as-is. Typically NULL.

\return none

wiced_bt_gpio_select_status_t wiced_hal_gpio_select_function	(	wiced_bt_gpio_numbers_t	pin,
		wiced_bt_gpio_function_t	function
	)

Configure a GPIO pin to have the chosen functionality.

Parameters

pin	(0-39) (Only LHL GPIO supported for now)
function	Chosen functionality

Returns: : TRUE - successful save/update; FALSE - run out of entries, not able to save or invalid pin

void wiced_hal_gpio_set_pin_output	(	uint32_t	pin,
		uint32_t	val
	)

Sets the output value of a pin.

Note that the pin must already be configured as output or this will have no visible effect.

All input parameter values must be in range or the function will have no effect.

Parameters

pin	- pin id (0-39).
val	- the output value 0 - pin will be set to 0 non-zero - pin will be set to 1

Returns: none

wiced_bool_t wiced_hal_gpio_slimboot_reenforce_cfg	(	uint8_t	pin,
		uint16_t	config
	)

save the LHL GPIO configuration in AON memeory to reenforce in slimboot This is a must if we want to wake up in SDS by external LHL GPIO interrupts

Parameters

pin	- pin id (0-39)
config	- Gpio configuration.

Returns: : TRUE - successful save/update; FALSE - run out of entries, not able to save or invalid pin; none


			AIROC^™ BTSDK v4.9 - Documentation

Macros

Typedefs

Enumerations

Functions

Detailed Description

Macro Definition Documentation

Enumeration Type Documentation

Function Documentation