AIROC™ BTSDK v4.9 - Documentation | ||||
Typedefs | |
typedef enum SPI_MODE | SPI_MODE |
Clock polarity and phase If CPOL=0, base value of the clock is zero If CPOL=1, base value of the clock is one If CPHA=0, sample on leading (first) clock edge If CPHA=1, sample on trailing (second) clock edge. | |
typedef enum SPI_SS_POLARITY | SPI_SS_POLARITY |
Slave select polarity (output from master) | |
typedef enum SPI_ENDIAN | SPI_ENDIAN |
SPI Endian: Direction of bit data flow (MSB or LSB first). | |
typedef enum SPI_SS_MODE | SPI_SS_MODE |
For all the available GPIO config combinations (spiGpioCfg) for master and slave modes, please reference the User Documentation, since the values vary by hardware platform. More... | |
Enumerations | |
enum | { SPI_MASTER_ROLE = 1, SPI_SLAVE_ROLE = 2 } |
Defines an SPI driver to facilitate communication with other devices on an SPI bus (such as a temperature sensor, etc). More... | |
enum | SPI_MODE { SPI_MODE_0, SPI_MODE_1, SPI_MODE_2, SPI_MODE_3 } |
Clock polarity and phase If CPOL=0, base value of the clock is zero If CPOL=1, base value of the clock is one If CPHA=0, sample on leading (first) clock edge If CPHA=1, sample on trailing (second) clock edge. More... | |
enum | SPI_SS_POLARITY { SPI_SS_ACTIVE_LOW, SPI_SS_ACTIVE_HIGH } |
Slave select polarity (output from master) More... | |
enum | SPI_ENDIAN { SPI_MSB_FIRST, SPI_LSB_FIRST } |
SPI Endian: Direction of bit data flow (MSB or LSB first). More... | |
enum | SPI_SS_MODE { SPI_SS_NORMAL, SPI_SS_INACTIVE_BTW_BYTES } |
For all the available GPIO config combinations (spiGpioCfg) for master and slave modes, please reference the User Documentation, since the values vary by hardware platform. More... | |
enum | { INPUT_PIN_PULL_UP = 0x0400, INPUT_PIN_PULL_DOWN = 0x0200, INPUT_PIN_FLOATING = 0x0 } |
enum | SPIFFY_STATUS { SPIFFY_SUCCESS, SPIFFY_SLAVE_NOT_ENOUGH_RX_FIFO_BYTES } |
Functions | |
void | wiced_hal_pspi_init (uint8_t devRole, uint32_t clkSpeed, SPI_ENDIAN endian, SPI_SS_POLARITY polarity, SPI_MODE mode) |
Initialize the SPI driver with the given parameters. More... | |
void | wiced_hal_pspi_tx_data (uint32_t txLen, const uint8_t *txBuf) |
Send/transmit data over SPI as the master. More... | |
void | wiced_hal_pspi_rx_data (uint32_t rxLen, uint8_t *rxBuf) |
Receive data over SPI as the master. More... | |
void | wiced_hal_pspi_reset (void) |
Reset and bring the SPI driver to a known good state with default configuration. More... | |
void | wiced_hal_pspi_exchange_data (uint32_t len, const uint8_t *txBuf, uint8_t *rxBuf) |
Transmit one buffer of data while simultaneously receiving data (as the master). More... | |
void | wiced_hal_pspi_slave_enable_tx (void) |
Enable the tx fifo so any data in it will be transmitted when the SPI master clocks it out. More... | |
void | wiced_hal_pspi_slave_disable_tx (void) |
Disable the tx fifo. More... | |
void | wiced_hal_pspi_slave_enable_rx (void) |
Enable the rx fifo for incoming data when the SPI master clocks it in. More... | |
void | wiced_hal_pspi_slave_disable_rx (void) |
Disable the rx fifo. More... | |
void | wiced_hal_pspi_slave_tx_data (uint32_t txLen, const uint8_t *txBuf) |
Send/transmit data over SPI as a slave. More... | |
uint32_t | wiced_hal_pspi_slave_rx_data (uint32_t rxLen, uint8_t *rxBuf) |
Receive data over SPI as a slave. More... | |
uint32_t | wiced_hal_pspi_slave_get_tx_fifo_count (void) |
Get the number of bytes in the slave tx fifo. More... | |
uint32_t | wiced_hal_pspi_slave_get_rx_fifo_count (void) |
Get the number of bytes in the slave rx fifo. More... | |
typedef enum SPI_SS_MODE SPI_SS_MODE |
For all the available GPIO config combinations (spiGpioCfg) for master and slave modes, please reference the User Documentation, since the values vary by hardware platform.
Slave Select mode (output from master)
anonymous enum |
Defines an SPI driver to facilitate communication with other devices on an SPI bus (such as a temperature sensor, etc).
The driver is capable of assuming either a master or a slave role on said bus. Applications use this driver to obtain the status from and control the behavior of the SPI hardware. This driver only offers services for clock control, mode control and data transfer operations. The application is responsible for generating the slave/chip select signals (if it's in a master role). This could be done by mapping a GPIO pin for each slave the application wants to control (See wiced_hal_gpio.h for more information on driving a GPIO pin).
All master data transfer operations (half/full duplex) provided by this driver assume that the desired slave has already been selected and will remain selected throughout the duration of the transaction.
Please note that this driver cannot access supplied off-chip memory (if installed; serial flash, etc). Please use the drivers found in wiced_hal_sflash.h or wiced_hal_seeprom.h to access those modules, as those drivers deal with a separate SPI bus and include checks to ensure safe data handling operations. This driver is intended only to interface with other devices on the peripheral SPI bus, such as a motion sensor. Of course, this restriction does not preclude the user from adding their own memory module to the peripheral bus, and using this driver with it.Type Definitions
enum SPI_ENDIAN |
enum SPI_MODE |
Clock polarity and phase If CPOL=0, base value of the clock is zero If CPOL=1, base value of the clock is one If CPHA=0, sample on leading (first) clock edge If CPHA=1, sample on trailing (second) clock edge.
enum SPI_SS_MODE |
For all the available GPIO config combinations (spiGpioCfg) for master and slave modes, please reference the User Documentation, since the values vary by hardware platform.
Slave Select mode (output from master)
Enumerator | |
---|---|
SPI_SS_NORMAL |
Slave select normal. |
SPI_SS_INACTIVE_BTW_BYTES |
Slave select goes inactive between bytes. |
enum SPI_SS_POLARITY |
void wiced_hal_pspi_exchange_data | ( | uint32_t | len, |
const uint8_t * | txBuf, | ||
uint8_t * | rxBuf | ||
) |
Transmit one buffer of data while simultaneously receiving data (as the master).
Assumes that the slave/chip select line will be active throughout this transaction.
len | - The number of bytes to transmit and receive. |
txBuf | - Pointer to the data buffer to transmit. |
rxBuf | - Pointer to the buffer where the read data will be stored. |
void wiced_hal_pspi_init | ( | uint8_t | devRole, |
uint32_t | clkSpeed, | ||
SPI_ENDIAN | endian, | ||
SPI_SS_POLARITY | polarity, | ||
SPI_MODE | mode | ||
) |
Initialize the SPI driver with the given parameters.
Please reference the various parameters above.
In this function, the hardware block will be reset. The driver will be configured before the first transaction with a device.
For the chip select (CS) line, define the Port/Pin you want to use. There could be up to 40 GPIO pins on a board so the numbering is P0 - P39.
Remember that P# is the physical pin number on the board minus 1. Ex: Board Pin 4 = P3.
devRole | - SPI HW to play either master (1) or slave (2). |
clkSpeed | - Clock speed (non-zero for master, zero for slave). |
endian | - Direction of bit data flow (MSB or LSB first). |
mode,- | SPI mode (0-3). |
void wiced_hal_pspi_reset | ( | void | ) |
Reset and bring the SPI driver to a known good state with default configuration.
Note that the hardware block will be reset.
none |
void wiced_hal_pspi_rx_data | ( | uint32_t | rxLen, |
uint8_t * | rxBuf | ||
) |
Receive data over SPI as the master.
Assumes that the slave/chip select line will be active throughout the transaction.
txLen | - Length of the data buffer to receive. |
txBuf | - Pointer to the data buffer which will receive data. |
void wiced_hal_pspi_slave_disable_rx | ( | void | ) |
Disable the rx fifo.
none |
void wiced_hal_pspi_slave_disable_tx | ( | void | ) |
Disable the tx fifo.
none |
void wiced_hal_pspi_slave_enable_rx | ( | void | ) |
Enable the rx fifo for incoming data when the SPI master clocks it in.
none |
void wiced_hal_pspi_slave_enable_tx | ( | void | ) |
Enable the tx fifo so any data in it will be transmitted when the SPI master clocks it out.
none |
uint32_t wiced_hal_pspi_slave_get_rx_fifo_count | ( | void | ) |
Get the number of bytes in the slave rx fifo.
none |
uint32_t wiced_hal_pspi_slave_get_tx_fifo_count | ( | void | ) |
Get the number of bytes in the slave tx fifo.
none |
uint32_t wiced_hal_pspi_slave_rx_data | ( | uint32_t | rxLen, |
uint8_t * | rxBuf | ||
) |
Receive data over SPI as a slave.
If the rx fifo is enabled, pull data from the rx fifo if there are at least rxLen bytes in the rx fifo.
txLen | - Length of the data buffer to receive. |
txBuf | - Pointer to the data buffer which will receive data. |
void wiced_hal_pspi_slave_tx_data | ( | uint32_t | txLen, |
const uint8_t * | txBuf | ||
) |
Send/transmit data over SPI as a slave.
If the tx fifo is enabled, the data in the tx fifo will be transmitted when the SPI master clocks it out.
txLen | - The number of bytes-to-send that this buffer contains. |
txBuf | - Pointer to the data buffer to transmit. |
void wiced_hal_pspi_tx_data | ( | uint32_t | txLen, |
const uint8_t * | txBuf | ||
) |
Send/transmit data over SPI as the master.
Assumes that the slave/chip select line will be active throughout the transaction.
txLen | - The number of bytes-to-send that this buffer contains. |
txBuf | - Pointer to the data buffer to transmit. |