AIROC™ BTSDK v4.9 - Documentation | ||||
Data Structures | |
struct | HCI_CMD_TAG |
HCI command header. Internal. NOTE: PUART does not support HCI commands. More... | |
struct | P_UART_TRANSPORT_PACKET_TAG |
PUART transport packet type defines. More... | |
Macros | |
#define | P_UART_INT_STATUS_ADDR sr_ptu_status_adr5 |
Defines a Peripheral UART driver. More... | |
#define | P_UART_INT_ENABLE_ADDR sr_ptu_en_adr5 |
#define | P_UART_RX_FIFO_ADDR dp_uart2_data_adr |
#define | P_UART_TX_FIFO_ADDR dp_uart2_data_adr |
#define | P_UART_WATER_MARK_RX_ADDR dc_ptu_uart2_rfl_adr |
#define | P_UART_WATER_MARK_TX_ADDR dc_ptu_uart2_tfl_adr |
#define | P_UART_FLOW_CONTROL_WATER_MARK_ADDR dc_ptu_uart2_rfc_adr |
#define | P_UART_LINE_CONTROL_ADDR dc_ptu_uart2_lcr_adr |
#define | P_UART_LINE_STATUS_ADDR dc_ptu_uart2_lsr_adr |
#define | P_UART_MODEM_CONTROL_ADDR dc_ptu_uart2_mcr_adr |
#define | P_UART_HIGH_BAUDRATE_DIV_ADDR dc_ptu_uart2_dhbr_adr |
#define | P_UART_LOW_BAUDRATE_DIV_ADDR dc_ptu_uart2_dlbr_adr |
#define | P_UART_FIFO_CONTROL_ADDR dc_ptu_uart2_fcr_adr |
#define | P_UART_MSR_LINE_ADDR dc_ptu_uart2_msr_adr |
#define | P_UART_PTU_HC_SEL_ADDR dc_ptu_hc_sel_adr |
#define | P_UART_ESC_ADDR dc_ptu_uart2_esc_adr |
#define | P_UART_IN_BUFFER_LEN 16 |
PUART RX buffer depth. This is fixed to 16 bytes and cannot be changed. | |
#define | P_UART_RX_FIFO_SIZE P_UART_IN_BUFFER_LEN |
PUART HW RX FIFO depth. This is fixed to 16 bytes and cannot be changed. | |
#define | P_UART_OUT_BUFFER_LEN 16 |
PUART TX buffer depth. This is fixed to 16 bytes and cannot be changed. | |
#define | P_UART_TX_FIFO_SIZE P_UART_OUT_BUFFER_LEN |
PUART HW TX FIFO depth. This is fixed to 16 bytes and cannot be changed. | |
#define | P_UART_WATER_MARK_RX_LEVEL_HIGHEST (P_UART_RX_FIFO_SIZE - 1) |
Highest RX watermark is FIFO - 1. | |
#define | P_UART_WATER_MARK_TX_LEVEL_HIGHEST (P_UART_TX_FIFO_SIZE - 1) |
Highest TX watermark is FIFO - 1. | |
#define | P_UART_WATER_MARK_RX_LEVEL_ONE_BYTE 1 |
Lowest RX watermark is 1 byte. | |
#define | P_UART_INT_ENABLE UART_REG(P_UART_INT_ENABLE_ADDR) |
Helper macros. | |
#define | P_UART_INT_STATUS UART_REG(P_UART_INT_STATUS_ADDR) |
#define | P_UART_INT_CLEAR(x) UART_REG(P_UART_INT_STATUS_ADDR) = x |
#define | P_UART_INT_DISABLE UART_REG(P_UART_INT_DISABLE_ADDR) |
#define | P_UART_RX_FIFO() UART_REG(P_UART_RX_FIFO_ADDR) |
#define | P_UART_TX_FIFO(x) UART_REG(P_UART_TX_FIFO_ADDR) = x |
#define | P_UART_LINE_CONTROL(x) UART_REG(P_UART_LINE_CONTROL_ADDR) = x |
#define | P_UART_LINE_CONTROL_GET() UART_REG(P_UART_LINE_CONTROL_ADDR) |
#define | P_UART_MODEM_CONTROL(x) UART_REG(P_UART_MODEM_CONTROL_ADDR) = x |
#define | P_UART_MODEM_CONTROL_GET() UART_REG(P_UART_MODEM_CONTROL_ADDR) |
#define | P_UART_FIFO_CONTROL(x) UART_REG(P_UART_FIFO_CONTROL_ADDR) = x |
#define | P_UART_MSR_STATUS() UART_REG(P_UART_MSR_LINE_ADDR) |
#define | P_UART_HIGH_BAUDRATE_DIV(x) UART_REG(P_UART_HIGH_BAUDRATE_DIV_ADDR) = x |
#define | P_UART_LOW_BAUDRATE_DIV(x) UART_REG(P_UART_LOW_BAUDRATE_DIV_ADDR) = x |
#define | P_UART_WATER_MARK_RX_LEVEL(x) UART_REG(P_UART_WATER_MARK_RX_ADDR) = x |
#define | P_UART_WATER_MARK_TX_LEVEL(x) UART_REG(P_UART_WATER_MARK_TX_ADDR) = x |
#define | P_UART_FLOW_CONTROL_WATER_MARK_LEVEL(x) UART_REG(P_UART_FLOW_CONTROL_WATER_MARK_ADDR) = x |
#define | P_UART_ESC_CHAR UART_REG(P_UART_ESC_ADDR) |
#define | P_UART_RX_FIFO_NOT_EMPTY() puart_rxFifoNotEmpty() |
Helper macro to check if the RX HW FIFO is not empty. | |
#define | P_UART_TX_FIFO_IS_EMPTY() ( ( REG32(P_UART_LINE_STATUS_ADDR) & ( P_UART_LSR_TX_FIFO_NOT_EMPTY | P_UART_LSR_TX_IDLE ) ) == P_UART_LSR_TX_IDLE ) |
Helper macro to check if the TX HW FIFO is empty. | |
Typedefs | |
typedef enum P_UART_RX_STATE_TAG | P_UART_RX_STATE |
PUART driver RX states. Internal. | |
typedef enum P_UART_TX_STATE_TAG | P_UART_TX_STATE |
PUART driver TX states. Internal. | |
typedef struct HCI_CMD_TAG | P_UART_HCI_CMD |
HCI command header. Internal. NOTE: PUART does not support HCI commands. | |
typedef enum P_UART_FUNCTION_TAG | P_UART_FUNCTION |
PUART function control. Internal. | |
typedef UINT8 | P_UART_TRANSPORT_PACKET_TYPE |
typedef struct P_UART_TRANSPORT_PACKET_TAG | P_UART_TRANSPORT_PACKET |
PUART transport packet type defines. | |
Enumerations | |
enum | { P_UART_ISR_TX_FF_MASK = 0x01, P_UART_ISR_TX_FAE_MASK = 0x02, P_UART_ISR_RX_AFF_MASK = 0x04, P_UART_ISR_RX_FE_MASK = 0x08, P_UART_ISR_RX_RES_MASK = 0x10, P_UART_ISR_RX_PE_MASK = 0x20, P_UART_ISR_RX_BRK_MASK = 0x40, P_UART_ISR_RX_CTS_MASK = 0x80 } |
PUART interrupt control bits. Internal. | |
enum | { P_UART_LCR_STB_MASK = 0x0001, P_UART_LCR_PEN_MASK = 0x0002, P_UART_LCR_EPS_MASK = 0x0004, P_UART_LCR_RXEN_MASK = 0x0008, P_UART_LCR_LBC_MASK = 0x0010, P_UART_LCR_TXOEN_MASK = 0x0020, P_UART_LCR_RTSOEN_MASK = 0x0040, P_UART_LCR_SLIP_MASK = 0x0080, P_UART_LCR_SLIP_CRC_RX_ENABLE_MASK = 0x0100, P_UART_LCR_SLIP_CRC_INVERT_MASK = 0x0200, P_UART_LCR_SLIP_CRC_LSB_1ST_MASK = 0x0400, P_UART_LCR_SLIP_CRC_TX_ENABLE_MASK = 0x0800 } |
PUART line control bits. Internal. More... | |
enum | { P_UART_LSR_TX_FIFO_NOT_EMPTY = 0x0004, P_UART_LSR_TX_IDLE = 0x0008, P_UART_LSR_END_DELIMETER_NOT_DONE_MASK = 0x0010 } |
PUART status bits. Internal. | |
enum | { P_UART_MCR_TXEN_MASK = 0x0001, P_UART_MCR_RTS_MASK = 0x0002, P_UART_MCR_XON_XOFF_MASK = 0x0004, P_UART_MCR_HIGH_RATE_MASK = 0x0008, P_UART_MCR_LOOPBACK_MASK = 0x0010, P_UART_MCR_AUTORTS_MASK = 0x0020, P_UART_MCR_AUTOCTS_MASK = 0x0040, P_UART_MCR_BAUD_ADJ_MASK = 0x0080, P_UART_MCR_PKT_FLOW_RX_MASK = 0x0100, P_UART_MCR_SEND_XON_NOW = 0x0200 } |
PUART modem control bits. Internal. More... | |
enum | { P_UART_MSR_CTS_MASK = 0x0001, P_UART_MSR_RX_MASK = 0x0004 } |
PUART modem status bits. Internal. | |
enum | { P_UART_FCR_RX_FIFO_RESET_MASK = 0x001, P_UART_FCR_TX_FIFO_RESET_MASK = 0x002, P_UART_FCR_SLIP_RX_RESYNC_MASK = 0x004, P_UART_FCR_SLIP_START_END_FRAME_MASK = 0x008 } |
PUART flow control bits. Internal. | |
enum | { P_UART_CLK = 24000000, P_UART_SAMPLE_CLOCK = 16, DEFAULT_P_UART_BAUDRATE = 115200, DEFAULT_P_UART_HWFLOWCONTROLWATERMARK = 13, DEFAULT_P_UART_MIN_PKT_LENGTH = 1 } |
Some useful default constants used by teh driver. | |
enum | P_UART_RX_STATE_TAG { P_UART_RX_IDLE, P_UART_RX_TYPE, P_UART_RX_PAYLOAD, P_UART_RX_READ_DONE, P_UART_RX_RESYNC, P_UART_DROP_PACKET } |
PUART driver RX states. Internal. | |
enum | P_UART_TX_STATE_TAG { P_UART_TX_IDLE, P_UART_TX_BUSY, P_UART_TX_WAIT_FIFO_EMPTY, P_UART_TX_DONE, P_UART_TX_WRONG_STATE } |
PUART driver TX states. Internal. | |
enum | P_UART_FUNCTION_TAG { P_UART_HCI, P_UART_HID, P_UART_SENSOR } |
PUART function control. Internal. | |
Functions | |
void | puart_init (void) |
PUART initialization function. More... | |
void | puart_interruptHandler (void) |
ISR context interrupt handler. More... | |
void | puart_calculateBaudrate (UINT8 *dhbr, UINT8 *dlbr, UINT32 baudrate, UINT32 clk) |
Calculates the baud rate. Internal, not for app use. | |
void | puart_enableInterrupt (void) |
Enables CM3 interrupt from PUART HW block. | |
void | puart_flowOn (void) |
Turn on flow control. | |
void | puart_flowOff (void) |
Turn off flow control. | |
void | puart_disableTx (void) |
Disable the HW TX FIFO. | |
void | puart_enableTx (void) |
Enable the HW TXFIFO. | |
void | puart_setBaudrate (UINT8 dhbr, UINT8 dlbr, UINT32 baudrate) |
Set baud rate. More... | |
void | puart_synchronousRead (UINT8 *buffer, UINT32 length) |
Performs a blocking read from the RX FIFO. More... | |
void | puart_synchronousWrite (UINT8 *buffer, UINT32 length) |
Performs a blocking write to the TX FIFO. More... | |
BOOL32 | puart_rxFifoNotEmpty (void) |
Check if the RX FIFO is not empty. More... | |
int | puart_rxHandler (void *unused) |
Thread context RX interrupt dispatch function. Internal. | |
int | puart_txHandler (void *unused) |
Thread context TX interrupt dispatch function. Internal. | |
void | puart_print (char *string) |
Prints a string to PUART. More... | |
void | puart_write (UINT8 byte) |
Write a single byte to PUART. More... | |
BOOL32 | puart_read (UINT8 *readbyte) |
Read a single byte from PUART. More... | |
BOOL32 | puart_selectUartPads (UINT8 rxdPortPin, UINT8 txdPortPin, UINT8 ctsPortPin, UINT8 rtsPortPin) |
Allows the application to configure GPIOs for PUART. More... | |
BOOL32 | puart_checkRxdPortPin (UINT8 rxdPortPin) |
Check if the given RXd port-pin combination is valid for the SoC. More... | |
BOOL32 | puart_checkTxdPortPin (UINT8 txdPortPin) |
Check if the given TXd port-pin combination is valid for the SoC. More... | |
BOOL32 | puart_checkCtsPortPin (UINT8 ctsPortPin) |
Check if the given CTS port-pin combination is valid for the SoC. More... | |
BOOL32 | puart_checkRtsPortPin (UINT8 rtsPortPin) |
Check if the given RTS port-pin combination is valid for the SoC. More... | |
#define P_UART_INT_STATUS_ADDR sr_ptu_status_adr5 |
Defines a Peripheral UART driver.
PUART control registers. Internal.
anonymous enum |
PUART line control bits. Internal.
anonymous enum |
BOOL32 puart_checkCtsPortPin | ( | UINT8 | ctsPortPin | ) |
Check if the given CTS port-pin combination is valid for the SoC.
ctsPortPin | The GPIO PORT and pin combination for CTS. When P#, ctsPortPin = ((# / 16) << 5) | (# % 16). |
BOOL32 puart_checkRtsPortPin | ( | UINT8 | rtsPortPin | ) |
Check if the given RTS port-pin combination is valid for the SoC.
rtsPortPin | The GPIO PORT and pin combination for RTS. When P#, rtsPortPin = ((# / 16) << 5) | (# % 16). |
BOOL32 puart_checkRxdPortPin | ( | UINT8 | rxdPortPin | ) |
Check if the given RXd port-pin combination is valid for the SoC.
rxdPortPin | The GPIO PORT and pin combination for RXd. When P#, rxdPortPin = ((# / 16) << 5) | (# % 16). |
BOOL32 puart_checkTxdPortPin | ( | UINT8 | txdPortPin | ) |
Check if the given TXd port-pin combination is valid for the SoC.
txdPortPin | The GPIO PORT and pin combination for TXd. When P#, txdPortPin = ((# / 16) << 5) | (# % 16). |
void puart_init | ( | void | ) |
PUART initialization function.
This is to be invoked only once. If the application uses a non-NULL BLE_PROFILE_PUART_CFG when invoking bleapp_set_cfg, then this will be invoked by the framwork.
void puart_interruptHandler | ( | void | ) |
ISR context interrupt handler.
Internal. The application never needs to handle PUART interrupts in the ISR context. Interrupts are always serialized to application thread.
void puart_print | ( | char * | string | ) |
Prints a string to PUART.
string | NULL terminated string to write to PUART. |
BOOL32 puart_read | ( | UINT8 * | readbyte | ) |
Read a single byte from PUART.
readbyte | Pointer to allocated byte into which to read. |
BOOL32 puart_rxFifoNotEmpty | ( | void | ) |
Check if the RX FIFO is not empty.
BOOL32 puart_selectUartPads | ( | UINT8 | rxdPortPin, |
UINT8 | txdPortPin, | ||
UINT8 | ctsPortPin, | ||
UINT8 | rtsPortPin | ||
) |
Allows the application to configure GPIOs for PUART.
See datasheet for valid options.
rxdPortPin | The GPIO PORT and pin combination for RXd. When P#, rxdPortPin = ((# / 16) << 5) | (# % 16). |
txdPortPin | The GPIO PORT and pin combination for TXd. When P#, txdPortPin = ((# / 16) << 5) | (# % 16). |
ctsPortPin | The GPIO PORT and pin combination for CTS. When P#, ctsPortPin = ((# / 16) << 5) | (# % 16). |
rtsPortPin | The GPIO PORT and pin combination for RTS. When P#, rtsPortPin = ((# / 16) << 5) | (# % 16). |
void puart_setBaudrate | ( | UINT8 | dhbr, |
UINT8 | dlbr, | ||
UINT32 | baudrate | ||
) |
Set baud rate.
dhbr | Internal. Should be 0x00. |
dlbr | Internal. Should be 0x00. |
baudrate | The desired baudrate. |
void puart_synchronousRead | ( | UINT8 * | buffer, |
UINT32 | length | ||
) |
Performs a blocking read from the RX FIFO.
buffer | Pointer to allocated memory into which data from the RX FIFO is read into. If NULL, length bytes of data from the RX FIFO will be discarded. |
length | The number of bytes to read from the RX FIFO. |
void puart_synchronousWrite | ( | UINT8 * | buffer, |
UINT32 | length | ||
) |
Performs a blocking write to the TX FIFO.
buffer | Pointer to the buffer that has the data to be written to the TX FIFO. Cannot be NULL. |
length | The number of bytes to write. Cannot be larger than 16. |
void puart_write | ( | UINT8 | byte | ) |
Write a single byte to PUART.
byte | The byte to write. |