aclk.h File Reference

Defines functions to access auxiliary clock peripheral, which can be used to output a free running clock signal to an GPIO or as a reference clock to the on-chip PWM. More...

Enumerations
enum	{   HW_MIA_ACLK_CTL_ACLK0_SHIFT = 0, HW_MIA_ACLK_CTL_ACLK0_DIV_MASK = 0x000000FF, HW_MIA_ACLK_CTL_ACLK0_DIV_SHIFT = 0, HW_MIA_ACLK_CTL_ACLK0_POST_DIV_MASK = 0x00000700,   HW_MIA_ACLK_CTL_ACLK0_POST_DIV_SHIFT = 8, HW_MIA_ACLK_CTL_ACLK0_ENABLE_MASK = 0x00001000, HW_MIA_ACLK_CTL_ACLK0_ENABLE = 0x00001000, HW_MIA_ACLK_CTL_ACLK0_DISABLE = 0x00000000,   HW_MIA_ACLK_CTL_ACLK0_CLK_SRC_SEL_MASK = 0x00008000, HW_MIA_ACLK_CTL_ACLK0_CLK_SRC_24_MHZ = 0x00008000, HW_MIA_ACLK_CTL_ACLK0_CLK_SRC_1_MHZ = 0x00000000, HW_MIA_ACLK_CTL_ACLK0_MASK_ALL,   HW_MIA_ACLK_CTL_ACLK1_SHIFT = 16, HW_MIA_ACLK_CTL_ACLK1_DIV_MASK = 0x00FF0000, HW_MIA_ACLK_CTL_ACLK1_DIV_SHIFT = 16, HW_MIA_ACLK_CTL_ACLK1_POST_DIV_MASK = 0x07000000,   HW_MIA_ACLK_CTL_ACLK1_POST_DIV_SHIFT = 24, HW_MIA_ACLK_CTL_ACLK1_ENABLE_MASK = 0x10000000, HW_MIA_ACLK_CTL_ACLK1_ENABLE = 0x10000000, HW_MIA_ACLK_CTL_ACLK1_DISABLE = 0x00000000,   HW_MIA_ACLK_CTL_ACLK1_CLK_SRC_SEL_MASK = (int)0x80000000, HW_MIA_ACLK_CTL_ACLK1_CLK_SRC_24_MHZ = (int)0x80000000, HW_MIA_ACLK_CTL_ACLK1_CLK_SRC_1_MHZ = 0x00000000, HW_MIA_ACLK_CTL_ACLK1_MASK_ALL }
	Defines an Aclk driver.
enum	CLK_SRC_SEL { ACLK0, ACLK1 }
	ACLK channel selection. More...
enum	CLK_SRC_FREQ_SEL { ACLK_FREQ_1_MHZ, ACLK_FREQ_24_MHZ }
	Internal reference clock for the ACLK generator circuit. More...

Functions
void	aclk_configure (UINT32 frequency, UINT32 src, UINT32 freqSel)
	Configures an ACLK reference channel. More...
void	aclk_disableClock (UINT32 src)
	Disable an ACLK reference channel. More...

Detailed Description

Defines functions to access auxiliary clock peripheral, which can be used to output a free running clock signal to an GPIO or as a reference clock to the on-chip PWM.