Defines a driver to facilitate interfacing with the auxiliary clock.
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Defines a driver to facilitate interfacing with the auxiliary clock.
Use this driver to output a clock to a GPIO pin for external use. Two clock sources are avaliable: clk0 or clk1, as well as two base frequencies used to calulate the prescaler : 1 MHz or 24 MHz. Note that the desired GPIO pin must have already been configured to output for aclk. See the HW muxing section in the Kit Guide for more information.
Parameters.
The following enumerations are used to configure the driver or define
return status. They are not modifiable.
Available clock sources.
enum CLK_SRC_SEL
{
ACLK0,
ACLK1,
WICED_ACLK0 = ACLK0,
WICED_ACLK1 = ACLK1
};
Available base clock frequencies.
enum CLK_SRC_FREQ_SEL
{
ACLK_FREQ_1_MHZ,
ACLK_FREQ_24_MHZ
WICED_ACLK_FREQ_24_MHZ = ACLK_FREQ_24_MHZ
};
| static INLINE void wiced_hal_aclk_disable |
( |
UINT32 |
clkSrc | ) |
|
|
static |
Disables the desired auxilary clock source.
- Parameters
-
| clkSrc | - Clock source to disable (aclk0 or aclk1). |
- Returns
- none
| static INLINE void wiced_hal_aclk_enable |
( |
UINT32 |
frequency, |
|
|
UINT32 |
clkSrc, |
|
|
UINT32 |
baseFreqSel |
|
) |
| |
|
static |
Configures, enables, and starts the aclk to be active on a preconfigured GPIO pin.
(!) Note that the desired GPIO pin must have already been configured to output for aclk. See the HW muxing section in the HW User Manual or Kit Guide for your device for more information.
- Parameters
-
| frequency | - Desired frequency to output; 0 is the same as disable. |
| clkSrc | - ACLK0 or ACLK1 |
| baseFreqSel | - ACLK_FREQ_1_MHZ or ACLK_FREQ_24_MHZ. |
- Returns
- none
| UINT32 wiced_hal_aclk_pads_config |
( |
UINT32 |
gpio, |
|
|
UINT32 |
src |
|
) |
| |
Configure the GPIO pin for the desired auxilary clock source.
This function is in the wiced_hal_aclk_lib.a library.
- Parameters
-
| gpioPin | - GPIO pin for the output of Clock source. Only gpio pin 32, 36 are for ACLK 0 Only gpio pin 33, 37 are for ACLK 1 |
| clkSrc | - Clock source to disable (aclk0 or aclk1). 0 - aclk0 1 - aclk1 |
- Returns
- TRUE - Success FALSE - Failed
