Pins associated with connections on the board for communication interfaces (UART/I2C/SPI/...)
Macros | |
#define | CYBSP_DEBUG_UART_RX (P5_0) |
Pin: UART RX. | |
#define | CYBSP_DEBUG_UART_TX (P5_1) |
Pin: UART TX. | |
#define | CYBSP_I2C_SCL (P6_0) |
Pin: I2C SCL. | |
#define | CYBSP_I2C_SDA (P6_1) |
Pin: I2C SDA. | |
#define | CYBSP_SWDIO P6_6 |
Pin: SWDIO. | |
#define | CYBSP_SWDCK P6_7 |
Pin: SWDCK. | |
#define | CYBSP_SWO P6_4 |
Pin: SWO. | |
#define | CYBSP_QSPI_SS (P11_2) |
Pin: QUAD SPI SS. | |
#define | CYBSP_QSPI_D3 (P11_3) |
Pin: QUAD SPI D3. | |
#define | CYBSP_QSPI_D2 (P11_4) |
Pin: QUAD SPI D2. | |
#define | CYBSP_QSPI_D1 (P11_5) |
Pin: QUAD SPI D1. | |
#define | CYBSP_QSPI_D0 (P11_6) |
Pin: QUAD SPI D0. | |
#define | CYBSP_QSPI_SCK (P11_7) |
Pin: QUAD SPI SCK. | |
#define | CYBSP_WIFI_SDIO_D0 (P2_0) |
Pin: WIFI SDIO D0. | |
#define | CYBSP_WIFI_SDIO_D1 (P2_1) |
Pin: WIFI SDIO D1. | |
#define | CYBSP_WIFI_SDIO_D2 (P2_2) |
Pin: WIFI SDIO D2. | |
#define | CYBSP_WIFI_SDIO_D3 (P2_3) |
Pin: WIFI SDIO D3. | |
#define | CYBSP_WIFI_SDIO_CMD (P2_4) |
Pin: WIFI SDIO CMD. | |
#define | CYBSP_WIFI_SDIO_CLK (P2_5) |
Pin: WIFI SDIO CLK. | |
#define | CYBSP_WIFI_WL_REG_ON (P2_6) |
Pin: WIFI ON. | |
#define | CYBSP_WIFI_HOST_WAKE CYBSP_SW2 |
Pin: WIFI Host Wakeup. | |
#define | CYBSP_WIFI_HOST_WAKE_GPIO_DM (CYHAL_GPIO_DRIVE_ANALOG) |
WiFi host-wake GPIO drive mode. | |
#define | CYBSP_WIFI_HOST_WAKE_IRQ_EVENT (CYHAL_GPIO_IRQ_RISE) |
WiFi host-wake IRQ event. | |
#define | CYBSP_BT_UART_RX (P3_0) |
Pin: BT UART RX. | |
#define | CYBSP_BT_UART_TX (P3_1) |
Pin: BT UART TX. | |
#define | CYBSP_BT_UART_RTS (P3_2) |
Pin: BT UART RTS. | |
#define | CYBSP_BT_UART_CTS (P3_3) |
Pin: BT UART CTS. | |
#define | CYBSP_BT_POWER (P3_4) |
Pin: BT Power. | |
#define | CYBSP_BT_HOST_WAKE (P4_0) |
Pin: BT Host Wakeup. | |
#define | CYBSP_BT_HOST_WAKE_GPIO_DM (CYHAL_GPIO_DRIVE_NONE) |
BT host-wake GPIO drive mode. | |
#define | CYBSP_BT_HOST_WAKE_IRQ_EVENT (CYHAL_GPIO_IRQ_FALL) |
BT host wake IRQ event. | |
#define | CYBSP_BT_DEVICE_WAKE (P3_5) |
Pin: BT Device Wakeup. | |
#define | CYBSP_BT_DEVICE_WAKE_GPIO_DM (CYHAL_GPIO_DRIVE_STRONG) |
BT device wakeup GPIO drive mode. | |
#define | CYBSP_BT_DEVICE_WAKE_POLARITY (0u) |
BT device wakeup polarity. | |
#define | CYBSP_PDM_CLK (P10_4) |
Pin: PDM PCM CLK. | |
#define | CYBSP_PDM_DATA (P10_5) |
Pin PDM PCM DATA. | |
#define | CYBSP_I2S_MCLK CYBSP_DEBUG_UART_RX |
Pin: I2S MCLK. | |
#define | CYBSP_I2S_TX_SCK CYBSP_DEBUG_UART_TX |
Pin: I2S TX SCK. | |
#define | CYBSP_I2S_TX_WS (P5_2) |
Pin: I2S TX WS. | |
#define | CYBSP_I2S_TX_DATA (P5_3) |
Pin: I2S TX DATA. | |
#define | CYBSP_I2S_RX_SCK (P5_4) |
Pin: I2S RX SCK. | |
#define | CYBSP_I2S_RX_WS (P5_5) |
Pin: I2S RX WS. | |
#define | CYBSP_I2S_RX_DATA (P5_6) |
Pin: I2S RX DATA. | |