ADC (Analog Digital Converter)

Features

The PSoC 6 ADC supports the following features:

• Resolution: 12 bit
• Only CYHAL_POWER_LEVEL_DEFAULT and CYHAL_POWER_LEVEL_OFF are defined. The default power level will automatically adjust based on smple rate.
• Average counts: 2, 4, 8, 16, 32, 64, 128, 256
• Up to four unique acquisition times.
• DMA-based transfer when using cyhal_adc_read_async. When using cyhal_adc_read_async_uv, only interrupt-driven software copy is supported.